E-fuse and method

A design structure embodied in a machine readable medium for designing, manufacturing, or testing a design, the design structure comprising:

• a first field effect transistor having drain connected to a first storage node, a gate connected to a second storage node and a source connected to a first source/drain of a second field effect transistor, a second source/drain of said second field effect transistor connected to a first power supply line;
• a third field effect transistor having a drain connected to said second storage node, a gate connected to said first storage node and a source connected to said first source/drain of said second transistor;
• and
• means for sensing the states of said first and second storage nodes.