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US 7,734,942 B2Granted
Enabling idle states for a component associated with an interconnect
AssigneeIntel Corporation
InventorsEric Dahlen, Jimbo Alexander, Parthipan Satchi
Life of this patent
Estimating the term…
Abstract
In one embodiment, the present invention includes a method for receiving an information packet in a first port from an interconnect while an agent associated with the first port is in an idle low power state, transmitting a first signal from the first port along the interconnect to request re-transmission of the information packet, and sending a second signal from the first port to the agent to cause the agent to enter a fully active power state. Other embodiments are described and claimed.
Claims21
A method comprising:
- receiving an information packet in a first port from an interconnect while an agent associated with the first port is in a low power state;
- transmitting a first signal from the first port along the interconnect to request re-transmission of the information packet, the first signal comprising a retry request generated responsive to a checksum failure for the information packet triggered responsive to receipt of the information packet when the agent is in the low power state, regardless of the content of the information packet;
- and
- sending a second signal from the first port to the agent to cause the agent to enter a full power state.
1 more element
An apparatus comprising:
- a receiver to receive an incoming packet from an interconnect;
- a packet detector to detect receipt of the incoming packet;
- and
- a wake circuit to cause an associated component to enter an active power state and to cause a transmitter to transmit a retry request along the interconnect if the component is in a powered-down state when the packet detector detects receipt of the incoming packet, the wake circuit comprising logic circuitry to receive a power status signal from the component and a detection signal from the packet detector and to output a single control signal to a checksum detector to initiate the retry request and to the component to initiate a transition to the active power state based on the power status signal and the detection signal.
1 more element
A system comprising:
- a first agent having a port coupled to a second agent via a serial interconnect, the port including a controller to cause the first agent to enter an active power state responsive to a first signal and to cause the port to transmit a retry request to the second agent responsive to the first signal if the first agent is in a low power state when an incoming packet is received, the controller to receive a power status signal from the first agent and a detection signal for the incoming packet and to output the first signal to a checksum detector to initiate the retry request and to the first agent to initiate a transition to the active power state based on the power status signal and the detection signal;
- and
- a dynamic random access memory (DRAM) coupled to the first agent.
Dependencies are inferred from the claim text.