Back to results
US 7,734,880 B2Granted
Flash memory system compensating reduction in read margin between memory cell program states
AssigneeSamsung Electronics Co., Ltd.
InventorsSang-gu Kang, Young-Ho Lim
Life of this patent
Estimating the term…
Abstract
A memory system includes a flash memory and a memory controller configured to control the flash memory. The memory controller determines whether program data provided from a host are all stored in the flash memory during a program operation. When the determination result is that the program data are all stored in the flash memory, the memory controller controls the flash memory to execute a dummy program operation for the next wordline of a final wordline in which the program data are stored.
Claims10
A memory system comprising:
- a flash memory having a memory cell array storing program data including a final data, the flash memory being configured to execute a first program operation on a selected wordline, and then execute a second program operation on an adjacent word line disposed directly adjacent to the selected word line;
- and
- a memory controller configured to determine whether all of the program data are stored in the flash memory by the first and second program operations, such that when it is determined that all of the program data are stored in the flash memory, the memory controller outputs a dummy program command and a dummy address, thereby causing the flash memory to execute a dummy program operation,
- wherein after executing the dummy program operation on a wordline identified by the dummy address, the flash memory is further configured to execute the second program operation on a final wordline corresponding to the final data of the program data.
1 more element
Dependencies are inferred from the claim text.