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US 7,733,986 B2Granted
Receiver and electronic apparatus
AssigneePanasonic Corporation
InventorsTakeshi Fujii, Hiroaki Ozeki
Life of this patent
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Abstract
A receiver has a receiving unit including a PLL, a mixer, and a filter, and demodulating unit including a frequency error detector for detecting a frequency error in a signal from a filter. The PLL includes a local oscillator for supplying a local oscillation signal to a mixer, a variable frequency divider for frequency-dividing the local oscillation signal based on a signal from the frequency error detector, and a phase comparator for comparing a signal from the variable frequency divider with a signal from a crystal oscillator. The PLL can reduce the frequency error of the local oscillation signal.
Claims8
A receiver comprising:
- an input terminal;
- a receiving unit coupled to the input terminal;
- a demodulating unit coupled to an output side of the receiving unit;
- and
- an output terminal coupled to an output side of the demodulating unit, the receiving unit including:
- a PLL;
- a mixer for mixing a local oscillation signal from the PLL and a signal from the input terminal;
- and
- a filter coupled to an output side of the mixer,
- the demodulating unit including:
- a frequency error detector for detecting a frequency error in a signal from the filter;
- a CPU for setting a frequency division ratio including an integer portion and a fractional portion;
- and
- a frequency controller for computing a correction value based on the detected frequency error and for computing a corrected frequency division ratio by adding or subtracting the correction value to the fractional portion of the frequency division ratio;
- the PLL including:
- a local oscillator for supplying the local oscillation signal to the mixer;
- a variable frequency divider for frequency-dividing the local oscillation signal from the local oscillator at the corrected frequency division ratio;
- an oscillator;
- and
- a phase comparator that is coupled to an input side of the local oscillator and compares a signal from the variable frequency divider with a signal from the oscillator.
17 more elements
An electronic apparatus comprising:
- an input terminal;
- a receiving unit coupled to the input terminal;
- a demodulating unit coupled to an output side of the receiving unit;
- an output terminal coupled to an output side of the demodulating unit;
- a signal processor coupled to the output terminal;
- and
- a display unit coupled to the signal processor,
- the receiving unit including:
- a PLL;
- a mixer for mixing a local oscillation signal from the PLL and a signal from the input terminal;
- and
- a filter coupled to an output side of the mixer,
- the demodulating unit including:
- a frequency error detector for detecting frequency error in a signal from the filter;
- a CPU for setting a frequency division ratio including an integer portion and a fractional portion;
- and
- a frequency controller for computing a correction value based on the detected frequency error and for computing a corrected frequency division ratio by adding or subtracting the correction value to the fractional portion of the frequency division ratio;
- the PLL including:
- a local oscillator for supplying the local oscillation signal to the mixer;
- a variable frequency divider for frequency-dividing the local oscillation signal from the local oscillator at the corrected frequency division ratio;
- an oscillator;
- and
- a phase comparator that is coupled to an input side of the local oscillator and compares a signal from the variable frequency divider with a signal from the oscillator.
20 more elements
A receiver for receiving an OFDM signal comprising:
- an input terminal;
- a receiving unit coupled to the input terminal;
- an OFDM signal demodulating unit coupled to an output side of the receiving unit;
- and
- an output terminal coupled to an output side of the OFDM signal demodulating unit,
- the receiving unit including:
- a fractional frequency division PLL;
- a mixer for mixing a local oscillation signal from the fractional frequency division PLL and a signal from the input terminal;
- and
- a filter coupled to an output side of the mixer,
- the OFDM signal demodulating unit including:
- a multiplier coupled to an output side of the filter;
- a frequency error detector for detecting a frequency error in a signal from the multiplier, coupled to an output side of the multiplier;
- and
- a numerically controlled oscillator coupled to an output side of the frequency error detector,
- the multiplier to which output signals of the numerically controlled oscillator are supplied, removing frequency error,
- the fractional frequency division PLL including:
- a local oscillator for supplying the local oscillation signal to the mixer;
- a variable frequency divider for frequency-dividing the local oscillation signal from the local oscillator at a frequency division ratio that is determined by performing addition and subtraction using a correction value and preset data for fractional frequency division PLL selection supplied from a CPU, the correction value being derived based on the frequency error detected by the frequency error detector without removing the frequency error by the multiplier at a timing of selecting a desired channel;
- an oscillator;
- and
- a phase comparator that is coupled to an input side of the local oscillator and compares a signal from the variable frequency divider with a signal from the oscillator.
19 more elements
Dependencies are inferred from the claim text.