Implementing phase rotator circuits with embedded polyphase filter network stage
AssigneeInternational Business Machines Corporation
InventorsSteven John Baumgartner, Anthony Richard Bonaccio, John Francis Bulzacchelli, Daniel Mark Dreps
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Abstract
A method for implementing phase rotator circuits and phase rotator circuit of the invention includes a polyphase filter network to create a quadrature phase version of the input signal. The polyphase filter network is partitioned into a first part that is physically isolated from the phase rotator circuit and a second part that is embedded in the phase rotator circuit. The second part of the polyphase filter is coupled to the first part of the polyphase filter by a high-pass equalizing buffer stage. The second part of the polyphase filter is coupled to the phase rotator circuit by a bandlimiting buffer stage.
Claims18
A polyphase filter network used with a phase rotator circuit comprising:
- said polyphase filter network creating a quadrature phase version of an input signal,
- said polyphase filter network being partitioned into a first part and a second part;
- said first part of said polyphase filter network being coupled to inputs of a first buffer stage of the phase rotator circuit;
- said first buffer stage including an equalizing buffer stage increasing amplitude of each respective input signal at a predefined frequency relative to DC;
- said second part of said polyphase filter network being coupled to outputs of said first equalizing buffer stage and being embedded in the phase rotator circuit;
- said second part of said polyphase filter network having a selected frequency response and being coupled to a pair of phase rotator multipliers of the phase rotator circuit by a second buffer stage;
- said second buffer stage including a lowpass buffer stage having a predefined lowpass frequency response and providing in-phase clock signals and quadrature clock signals to said pair of phase rotator multipliers;
- and
- said pair of phase rotator multipliers of the phase rotator circuit receiving mixing weights controlled by a plurality of binary control signals applied by a pair of digital-to-analog converters (DACs).
A method for implementing phase rotator circuits comprising the steps of:
- providing a polyphase filter network creating a quadrature phase version of an input signal including in-phase clock signals and quadrature clock signals;
- partitioning said polyphase filter network into a first part and a second part;
- said first part of said polyphase filter network being coupled to inputs of a first buffer stage of the phase rotator circuit and said first buffer stage including an equalizing buffer stage increasing amplitude of each respective input signal at a predefined frequency relative to DC;
- said second part of said polyphase filter network being coupled to outputs of said first equalizing buffer stage and being embedded in the phase rotator circuit;
- said second part of said polyphase filter network having a selected frequency response and being coupled to a pair of phase rotator multipliers of the phase rotator circuit by a second buffer stage;
- said second buffer stage including a lowpass buffer stage having a predefined lowpass frequency response and providing in-phase clock signals and quadrature clock signals to said pair of phase rotator multipliers;
- and
- providing a pair of digital-to-analog converters (DACs) for applying mixing weights controlled by a plurality of binary control signals to said pair of phase rotator multipliers of the phase rotator circuit.
Dependencies are inferred from the claim text.