Quadrature modulation circuits and systems supporting multiple modulation modes at gigabit data rates

A quadrature modulation circuit, comprising:

• a mixer circuit including an in-phase (I) mixer and a quadrature-phase (Q) mixer;
• and
• a summing circuit coupled to an output of the mixer circuit;
• wherein the I mixer comprises:
• a plurality of I mixer ports including a baseband input port, an output port, an LO (local oscillator) port and an I sign control port;
• and
• an integrated I sign modulation control circuit to control polarity switching of a signal at one of the I mixer ports in response to an I sign modulation control signal input to the I sign control port;
• wherein the Q mixer comprises:
• a plurality of Q mixer ports including a baseband input port, an output port, an LO (local oscillator) port and a Q sign control port;
• and
• an integrated Q sign modulation control circuit to control polarity switching of a signal at one of the Q mixer ports in response to a Q sign modulation control signal input to the Q sign control port;
• and
• wherein the summing circuit generates a modulated signal by adding signals output from the I and Q mixers,
• wherein the I mixer comprises an integrated I channel amplitude modulation control circuit to modulate an amplitude of an I-channel signal in response to an I gain control signal applied to an I gain control port of the I mixer, and wherein the Q mixer comprises an integrated Q-channel amplitude modulation control circuit to modulate an amplitude of a Q-channel signal in response to a Q gain control signal applied to a Q gain control port of the Q mixer,
• wherein the quadrature modulation circuit supports FSK (frequency-shift key), PSK (phase-shift key) and ASK (amplitude-shift key) modulation modes and simultaneous ASK/FSK and ASK/PSK modulation modes,
• wherein the quadrature modulation circuit performs ASK modulation by applying quadrature LO signals to the LO ports of the I and Q mixers, applying fixed-level DC signals to the baseband input ports of the I and Q mixers, applying fixed-level DC signals to the I and Q sign modulation control ports of the I and Q mixers, and applying a single digital data signal to both the I and Q gain control ports of the I and Q mixers to modulate the amplitude of I-channel and Q-channel signals, to thereby generate an ASK modulated signal the represents binary data of the digital data signal.