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US 7,733,732 B2Granted
Refreshing the content of a memory cell of a memory arrangement
AssigneeQimonda AG
InventorsChristian Sichert, Paul Wallner
Life of this patent
Estimating the term…
Abstract
A method of refreshing the content of a memory cell of a memory arrangement includes selectively controlling a refreshing device of the memory arrangement via an interface of the memory arrangement or by an internal control device of the memory arrangement to refresh the content of the memory arrangement.
Claims16
A method of refreshing the content of a memory cell of a memory arrangement, wherein the memory arrangement is operable in an active operating mode and a standby operating mode, the method comprising:
- selectively controlling a refreshing device of the memory arrangement via an interface of the memory arrangement or by an internal control device of the memory arrangement to refresh the content of the memory arrangement;
- and
- refreshing the content of the memory cell in the active operating mode controlled via the interface and refreshing the content of the memory cell in the standby operating mode controlled by the internal control device;
- wherein the memory arrangement is operated-in the standby operating mode if a command to operate the memory arrangement in the standby operating mode has been received via the interface.
1 more element
A method of refreshing the content of a memory cell of a memory arrangement, wherein the memory arrangement is operable in an active operating mode and a standby operating mode, the method comprising:
- selectively controlling a refreshing device of the memory arrangement via an interface of the memory arrangement or by an internal control device of the memory arrangement to refresh the content of the memory arrangement;
- and
- refreshing the content of the memory cell in the active operating mode controlled via the interface and refreshing the content of the memory cell in the standby operating mode controlled by the internal control device;
- wherein the memory arrangement is operated in the standby operating mode if a communication error has been identified by a data packet processing device of the memory arrangement, connected downstream of the interface.
1 more element
A memory arrangement comprising:
- an interface configured to transmit data and commands in the form of data packets according to a predetermined protocol;
- at least one memory cell;
- a refreshing device configured to refresh the content of the at least one memory cell;
- an internal control device configured to control the refreshing device;
- a switchover device connected to the internal control device, the interface, and the refreshing device, and configured to selectively switch through a signal from the interface or a signal from the internal control device to the refreshing device to control the refreshing of the content of the at least one memory cell;
- and
- a setting device con figured to set an operating mode of the memory arrangement, wherein the setting device is configured to set the memory device into an active operating mode or into a standby operating mode, and wherein the setting device is configured to control the switchover device such that in the active operating mode the switchover device switches through the signal from the interface and in the standby operating mode the signal from the internal control device to the refreshing device.
4 more elements
A memory arrangement comprising:
- an interface configured to transmit data and commands in the form of data packets according to a predetermined protocol;
- at least one memory cell;
- a refreshing device configured to refresh the content of the at least one memory cell;
- an internal control device configured to control the refreshing device;
- a switchover device connected to the internal control device, the interface, and the refreshing device, and configured to selectively switch through a signal from the interface or a signal from the internal control device to the refreshing device to control the refreshing of the content of the at least one memory cell;
- several memory cells, arranged in two memory banks, wherein each memory cell is related to either a first of the two memory banks or a second of the two memory banks;
- wherein the refreshing device comprises a first counter related to the first memory bank and a second counter related to the second memory bank;
- connecting lines between the counters and the memory banks for addressing the memory cells in the memory banks;
- and
- at least one multiplex device configured to at a first time connect the first counter to the first memory bank via the connecting lines and at a second time connect the second counter to the second memory bank via the connecting lines.
7 more elements
Dependencies are inferred from the claim text.