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US 7,733,726 B2Granted
Sense amplifier for non-volatile memories
AssigneeSTMicroelectronics S.r.l.
InventorFrancesco La Rosa
Life of this patent
Estimating the term…
Abstract
A sense amplifier for reading a memory cell, including a read node linked to the memory cell, and an active circuit structured to maintain a voltage appearing on the read node at a value inferior to a value of a selection transistor threshold voltage.
Claims24
A sense amplifier for reading a memory cell, the sense amplifier comprising:
- a read node linked to the memory cell;
- an active stage connected to the read node and comprising means for supplying a read current on the read node using a MOS transistor having a threshold voltage;
- a data output linked to a node of the active stage where a voltage appears which is representative of a state of conductivity of the memory cell;
- and
- means for maintaining a voltage (Vs) on the read node at a lower value than the threshold voltage, having:
- a first transistor and a second transistor arranged in series in the active stage, the second transistor being linked to the read node;
- and
- means for applying, to gate terminals of the first and second transistors, respective gate voltages having a controlled potential difference relative to each other.
5 more elements
A non-volatile memory, comprising:
- a memory cell;
- and
- a sense amplifier for reading the memory cell, wherein the sense amplifier comprises:
- a read node linked to the memory cell;
- an active stage connected to the read node and comprising means for supplying a read current on the read node using a MOS transistor having a threshold voltage;
- a data output linked to a node of the active stage where a voltage appears which is representative of a state of conductivity of the memory cell;
- and
- means for maintaining a voltage (Vs) on the read node at a lower value than the threshold voltage, having:
- a first transistor and a second transistor arranged in series in the active stage, the second transistor being linked to the read node;
- and
- means for applying, to gate terminals of said first and second transistors, respective gate voltages having a controlled potential difference relative to each other.
8 more elements
A sense amplifier comprising:
- a read node able to be coupled to a memory cell;
- an active stage coupled to said read node;
- a MOS selection transistor coupled to said read node and having a threshold voltage;
- and
- an active circuit structured to maintain a voltage on the read node lower than said threshold voltage, the active circuit including:
- two transistors in series with each other and coupled to the read node;
- and
- a control circuit structured to maintain a potential difference between the gates of said two transistors.
5 more elements
A method of reading a memory cell comprising:
- selecting the memory cell;
- connecting the memory cell to a read node of a sense amplifier;
- supplying a read current on the read node using a MOS transistor of the sense amplifier, the MOS transistor having a threshold voltage;
- and
- maintaining a read voltage on the read node at a value lower than the threshold voltage, wherein maintaining the read voltage of the read node at a lower value than the threshold voltage comprises:
- arranging a first transistor and a second transistor in series in the sense amplifier, the second transistor being linked to the read node;
- and
- applying, to gate terminals of the first and second transistors, respective gate voltages having a controlled potential difference relative to each other.
5 more elements
Dependencies are inferred from the claim text.