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US 7,733,698 B2Granted
Memory device, a non-volatile semiconductor memory device and a method of forming a memory device
AssigneeQimonda AG
InventorsJoachim Deppe, Dominik Olligs, Christoph Kleint, Eike Ruttkowski, Ricardo Mikalo
Life of this patent
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Abstract
A memory device having an array portion including memory cells, and a peripheral portion including conductive lines is disclosed. In one embodiment, portions of the conductive lines adjoin a surface of a semiconductor carrier.
Claims20
A non-volatile semiconductor memory device comprising:
- a memory cell array comprising NAND strings, wherein each NAND string comprises non-volatile memory transistors connected in series;
- a source line, configured to be connected with the NAND string array via select transistors;
- and
- a peripheral portion including conductive lines, portions of the conductive lines adjoining a surface of a semiconductor carrier.
1 more element
A non-volatile semiconductor memory device comprising:
- a memory cell array comprising NAND strings, wherein each NAND string comprises non-volatile memory transistors connected in series;
- a source line, configured to be connected with the NAND string array via select transistors;
- and
- a peripheral portion including conductive lines,
- wherein the conductive lines and the source line are disposed in a first conductive layer.
2 more elements
A memory device comprising:
- an array portion including memory cells;
- and
- a peripheral portion including isolation trenches disposed in a surface region of a semiconductor carrier, the isolation trenches being filled with an insulating material, and conductive lines, wherein a top diameter of the conductive lines is larger than a bottom diameter of the conductive lines and wherein portions of the conductive lines adjoin a surface of the isolation trenches.
A memory device comprising:
- an array portion including memory cells;
- and
- a peripheral portion including conductive lines, portions of the conductive lines adjoining a surface of a semiconductor carrier,
- wherein the array portion further includes source lines connected with selected ones of the memory cells, the source lines adjoining the surface of the semiconductor carrier.
1 more element
A memory device comprising:
- an array portion including memory cells;
- and
- a peripheral portion including conductive lines, portions of the conductive lines adjoining a surface of a semiconductor carrier,
- wherein the devices comprise transistors, each of the transistors comprising a doped portion, and the conductive lines are configured to connect doped portions of selected transistors.
1 more element
A memory device comprising:
- an array portion including memory cells;
- and
- a peripheral portion including conductive lines, portions of the conductive lines adjoining a surface of a semiconductor carrier,
- wherein the peripheral portion further comprises contact plugs made of a conductive material in contact with a top side of the conductive lines.
1 more element
A memory device comprising:
- an array portion including memory cells;
- and
- a peripheral portion including conductive lines, portions of the conductive lines adjoining a surface of a semiconductor carrier,
- wherein contact plugs made of a conductive material are present in the layer of the conductive lines.
1 more element
A memory device comprising:
- an array portion including memory cells;
- and
- a peripheral portion including conductive lines, portions of the conductive lines adjoining a surface of a semiconductor carrier,
- wherein a top diameter of the conductive lines is larger than a bottom diameter of the conductive lines.
1 more element
A memory device comprising:
- an array portion including memory cells and source lines in contact with selected ones of the memory cells, the source lines adjoining a surface of a semiconductor carrier;
- and
- a peripheral portion including conductive lines, portions of the conductive lines adjoining the surface of the semiconductor carrier.
A memory card including a non-volatile semiconductor memory device comprising:
- a memory cell array comprising NAND strings, wherein each NAND string comprises non-volatile memory transistors connected in series;
- a source line, configured to be connected with the NAND string array via select transistors;
- and
- a peripheral portion including conductive lines, portions of the conductive lines adjoining a surface of a semiconductor carrier.
1 more element
An electric device comprising:
- a card interface;
- a card slot connected to the card interface;
- and
- a memory card including a non-volatile semiconductor memory device comprising:
- a memory cell array comprising NAND strings, wherein each NAND string comprises non-volatile memory transistors connected in series;
- a source line, configured to be connected with the NAND string array via select transistors;
- a peripheral portion including conductive lines, portions of the conductive lines adjoining a surface of a semiconductor carrier;
- and
- the memory card being configured to be connected and removed from the card slot.
6 more elements
Dependencies are inferred from the claim text.