Semiconductor device
AssigneeNEC Electronics Corporation
InventorShougo Kawahigashi
Life of this patent
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Abstract
A semiconductor device includes a level shift circuit to convert an input signal having an amplitude from a first power supply potential to a second power supply potential to a signal having an amplitude from the first power supply potential to a third power supply potential, a first output portion to output voltage generated from the third power supply potential to an output terminal based on the output of the level shift circuit, the first output portion including a NMOS transistor, and a second output portion to output voltage generated from the third power supply potential to an output terminal based on the output of the level shift circuit, the second output portion including a PMOS transistor.
Claims6
A semiconductor device comprising:
- a level shift circuit to convert an input signal having an amplitude from a first power supply potential to a second power supply potential to a signal having an amplitude from the first power supply potential to a third power supply potential at a first node and a second node;
- a first output portion to output voltage generated from the third power supply potential to an output terminal based on the output of the level shift circuit, the first output portion including an NMOS transistor coupled between the first node and the third power supply potential;
- and
- a second output portion to output voltage generated from the third power supply potential to the output terminal based on the output of the level shift circuit, the second output portion including a PMOS transistor coupled between said first node and the third supply potential and having a gate being controlled by the second node.
A semiconductor device comprising:
- a level shift circuit to output signals at a first node and a second node, the level of the signals being converted in response to an input signal;
- a plurality of first-conductivity-type field effect transistors arranged in series between a higher power supply and a lower power supply and coupled to said first node;
- and
- a second-conductivity-type field effect transistor arranged between the higher power supply and the first node which is located between the plurality of first-conductivity-type field effect transistors and the higher power supply, the second-conductivity-type field effect transistor being controlled in response to the second node of the level shift circuit.
Dependencies are inferred from the claim text.