Variable-length digitally-controlled delay chain with interpolation-based tuning

A method of performing phase interpolation at a programmable delay element, the method comprising:

• receiving a forward path signal at a first input of the programmable delay element;
• delaying the forward path signal for a predetermined time;
• receiving a return path signal at a second input of the programmable delay element;
• determining relative proportions of the delayed forward path signal and the return path signal by summing current mode signals in accordance with a control input of the programmable delay element;
• and
• producing a phase interpolated output signal comprising the relative proportions of the delayed forward path signal and the return path signal at an output of the programmable delay element.

A programmable delay chain comprising:

• at least first, second, and third delay elements, each delay element including:
• a buffer configured to receive a source signal at a first input of the delay element and to provide a first delayed replica of the source signal at a first output of the delay element,
• a multiplexer having a first input coupled to the output of the buffer, a second input coupled to a second input of the delay element for receiving a further delayed replica of the source signal, and an output for providing an output signal comprising a first portion of the first delayed replica and a second portion of the further delayed replica at a second output of the delay element, a third input of the multiplexer being configured to receive a digitally coded control signal for determining the first and second portions of the respective delayed replicas, the multiplexer further comprising a plurality of current steering switches configured such that the state of each current steering switch is responsive to a corresponding portion of the digitally coded control signal,
• wherein the first, second, and third delay elements form a chain such that the first output of the first delay element is coupled to the first input of the second delay element, the first output of the second delay element is coupled to the first input of the third delay element, the second output of the third delay element is coupled to the second input of the second delay element, and the second output of the second delay element is coupled to the second input of the first delay element, and wherein the first input of the first delay element and the second output of the first delay element form the respective input and output of the programmable delay chain.

A delay chain having a plurality of programmable delay elements connected to exchange forward and return path clock signals, each programmable delay element in the delay chain generating an output signal representative of its respective forward and return path clock signals, the output signal comprising a sum of current mode signals determined according to its index of interpolation, the delay chain comprising:

• a first programmable delay element configured to receive an input clock signal on its forward path and having a first index of interpolation, the output signal of the first programmable delay element being delivered to an output of the delay chain;
• a second programmable delay element configured to receive a delayed replica of the input clock signal from the first programmable delay element on its forward path and having a second index of interpolation, the output signal of the second programmable delay element being delivered to the first programmable delay element as the return path clock signal;
• and
• a third programmable delay element configured to receive a further delayed replica of the input clock signal from the second programmable delay element on its forward path and having a third index of interpolation, the output signal of the third programmable delay element being delivered to the second programmable delay element as its return path clock signal, wherein a control signal of the delay chain determines the first, second, and third indices of interpolation.