Edge rate control for 12C bus applications
AssigneeNXP B.V.
InventorsAlma Anderson, Joseph Rutkowski, Dave Oehler
Life of this patent
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AssigneeNXP B.V.
InventorsAlma Anderson, Joseph Rutkowski, Dave Oehler
Estimating the term…
Consistent with an example embodiment, an edge-rate control circuit arrangement (300) for an I2C bus application comprises a first circuit stage (10, M1, M3), responsive to a state transition of a received signal. A second circuit stage (310, 25, 20, 35, 45, M4, ESD) is responsive to the state transition of the received signal and includes drive circuitry (M4) that is activated in response to the state transition of the received signal in order to provide an edge-transition signal for an I2C bus, and regulation circuitry (310, R1, R2, M0, M2) adapted to control the drive circuit and regulate a transition rate for the edge-transition signal, the transition rate being greater than a transition rate of the received signal at the first circuit stage and greater than a minimum and less than a maximum transition rate designated for communication on the I2C bus.
An edge-rate control circuit arrangement for an I2C bus application, the arrangement comprising:
An edge-rate control circuit arrangement for a serial-communication bus application, the arrangement comprising:
A method of edge-rate control for an I2C bus, the method comprising:
Dependencies are inferred from the claim text.