Circuits and methods for communicating data between domains during voltage and frequency shifting
AssigneeST-Ericsson SA
InventorNeal Thomas Wingen
Life of this patent
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Abstract
When communicating data between different voltage and frequency domains, for example chiplets, in an integrated circuit, the data signals can be formatted to compensate for propagation delays and different operating frequencies between the domains, and the signaling voltage level of the formatted data signals can then be changed from the operating voltage of the transmitting domain to the operating voltage of the receiving domain so that the formatted and changed data signals can be transmitted. As such, voltage crossings are combined with frequency crossings, which can have the effect of hiding the voltage shifting within the propagation delays.
Claims23
A method for communicating data from a first logic block to a second logic block, the method comprising:
- formatting data signals to compensate for propagation delays and different operating frequencies between the first logic block and the second logic block;
- changing a signal voltage level of the formatted data signals from an operating voltage of the first logic block to an operating voltage of the second logic block;
- and
- transmitting the formatted and changed data signals from the first logic block to the second logic block via data lines.
A circuit comprising:
- a first chiplet configured for an operating voltage and an operating frequency;
- a second chiplet configured for a different operating voltage and a different operating frequency, the first and second chiplets communicatively coupled by data paths that exhibit propagation delays;
- a data signal formatting circuit arranged to compensate for the propagation delays and different operating frequencies between the first chiplet and the second chiplet, the data signal formatting circuit further arranged to maintain an acceptable skew between formatted data signals;
- and
- a voltage shifting circuit arranged to receive the formatted data signals from the formatting circuit and change a signaling voltage level of the formatted data signals from the operating voltage of the first chiplet to the operating voltage of the second chiplet, such that the changed formatted data signals are conditioned for communication to the second chiplet.
An integrated circuit having a first logic block, the first logic block operable at a first clock frequency and a first voltage, and a second logic block, the second logic block operable at a second clock frequency and a second voltage, the first logic block comprising:
- a data transforming circuit arranged to transform a set of first data signals compatible with the first logic block into a set of outbound data signals compatible with the second logic block, the outbound set of data signals representative of the first set of data signals and an acceptable level of skew between individual signals of the set of outbound data signals;
- and
- a voltage transforming circuit arranged to transform the set of outbound data signals from the first voltage to the second voltage.
Dependencies are inferred from the claim text.