Implementing conditional statements in self-timed logic circuits

A circuit, comprising:

• a first logic circuit having a self-timed input and a self-timed output;
• a second logic circuit having a self-timed input and a self-timed output;
• an input circuit having a first self-timed output coupled to the input of the first logic circuit, a second self-timed output coupled to the input of the second logic circuit, and a self-timed select output;
• an output circuit having a first self-timed input coupled to the output of the first logic circuit, a second self-timed input coupled to the output of the second logic circuit, a self-timed select input, and first and second self-timed outputs;
• and
• a pipelined routing path routing a self-timed select signal from the select output of the input circuit to the select input of the output circuit,
• wherein the input circuit is coupled to provide a token with one of the first or second outputs based on the value of a control signal;
• and
• wherein the output circuit is coupled to provide an output token with one of the first or second outputs based on a value of the self-timed enable signal routed from the input circuit through the pipelined routing path.

An integrated circuit, comprising:

• an array of substantially similar programmable logic blocks;
• and
• a interconnect structure interconnecting the programmable logic blocks,
• wherein the array comprises:
• a first group of the logic blocks programmed to implement a first logic circuit having a self-timed input and a self-timed output;
• a second group of the logic blocks programmed to implement a second logic circuit having a self-timed input and a self-timed output;
• a third group of the logic blocks programmed to implement an input circuit coupled to provide the self-timed input to one of the first or second logic circuits based on the value of a control signal, and further coupled to output a self-timed select signal;
• and
• a fourth group of the logic blocks programmed to implement an output circuit coupled to receive the self-timed output from the first logic circuit and the self-timed output from the second logic circuit, and to output a selected one of the self-timed outputs based on a value of the self-timed select signal, and
• wherein the interconnect structure comprises a pipelined routing path routing the self-timed select signal from the input circuit to the output circuit.