Impedance adjustment circuit

Abstract

Disclosed is an impedance adjustment circuit including a comparator and a resistor control circuit. The comparator compares the resistance value of an external resistor and that of a replica resistor that forms a replica of a terminal resistor. The resistor control circuit includes a replica resistor control counter, a resistor-under-adjustment control signal holding circuit and a monitor circuit. The replica resistor control counter counts up and down based on the comparison result by the comparator to output a control signal to the replica resistor. The resistor-under-adjustment control signal holding circuit holds a control signal that is delivered to the terminal resistor. The monitor circuit receives the state of the counter and an output of the retention circuit and, in case the difference between the count state of the replica resistor control counter and an output of the resistor-under-adjustment control signal holding circuit is within a preset range, delivers the output of the resistor-under-adjustment control signal holding circuit as an input to the resistor-under-adjustment control signal holding circuit.

Dependencies are inferred from the claim text.