Method and system for eliminating DC bias on electrolytic capacitors and shutdown detecting circuit for current fed ballast
AssigneeGeneral Electric Company
InventorsTimothy Chen, Hailiang Miao, Nitin Kumar
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AssigneeGeneral Electric Company
InventorsTimothy Chen, Hailiang Miao, Nitin Kumar
Estimating the term…
A system and method is provided that eliminates DC bias on at least one of a first electrolytic capacitor and a second electrolytic capacitor of a bipolar junction transistor (BJT) based inverter ballast having a shutdown control circuit in association with only one of at least two BJT switches. A duty cycle dependent capacitor is connected in a series with a bus of the ballast, and a resonant circuit, including primary winding of the output transformer and a resonant capacitor. A balancing/charging resistor is connected at one end between the first electrolytic capacitor and the second electrolytic capacitor, and at another end to the duty cycle dependent capacitor and the resonant circuit.
A system that eliminates DC bias on at least one of a first electrolytic capacitor and a second electrolytic capacitor of a bipolar junction transistor based inverter ballast having a shutdown control circuit optionally associated with only one of at least two bipolar switches, the system comprising:
A method of eliminating DC bias on at least one of a first electrolytic capacitor and a second electrolytic capacitor of a bipolar junction transistor based inverter ballast having a shutdown control circuit on only one of at least two bipolar switches, the method comprising:
Dependencies are inferred from the claim text.