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US 7,732,912 B2Granted
Semiconductor chip packages and assemblies with chip carrier units
AssigneeTessera, Inc.
InventorPhilip Damberg
Life of this patent
Estimating the term…
Abstract
A microelectronic element package has one or more individual carrier units overlying a region or regions of the front or rear surface of the microelectronic element, leaving other regions of the microelectronic element surface uncovered. The carrier units can be made economically using only a small area of a dielectric film or other circuit panel material.
Claims40
A packaged microelectronic element comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent at least two of said edges;
- (b) a plurality of carrier units, each said carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the dielectric layers of the carrier units overlying edge regions of one of said surfaces of said microelectronic element adjacent at least two of said edges, said carrier units being spaced apart from one another so that a central region of said one of said surfaces between said edge regions is not covered by said carrier units, at least some of the conductive features of said carrier units being electrically connected to at least some of said contacts.
A packaged microelectronic element comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent at least two of said edges;
- (b) a plurality of carrier units, each said carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the carrier units overlying edge regions of one of said surfaces of said microelectronic element adjacent at least two of said edges, said carrier units being spaced apart from one another so that a central region of said one of said surfaces between said edge regions is not covered by said carrier units, at least some of the conductive features of said carrier units being electrically connected to at least some of said contacts;
- wherein said carrier units overlie edge regions of said front surface;
- and
- wherein said terminals include forward-facing terminals exposed at said front surfaces of said dielectric layers.
2 more elements
A packaged microelectronic element comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent at least two of said edges;
- (b) a plurality of carrier units, each said carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the carrier units overlying edge regions of one of said surfaces of said microelectronic element adjacent at least two of said edges, said carrier units being spaced apart from one another so that a central region of said one of said surfaces between said edge regions is not covered by said carrier units, at least some of the conductive features of said carrier units being electrically connected to at least some of said contacts;
- wherein said carrier units overlie edge regions of said front surface;
- and
- wherein said carrier units project laterally beyond said microelectronic element, said terminals including rear-facing terminals disposed laterally outward of said microelectronic element and exposed at said rear surfaces of said dielectric layers.
2 more elements
A packaged microelectronic element comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent at least two of said edges;
- (b) a plurality of carrier units, each said carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the carrier units overlying edge regions of one of said surfaces of said microelectronic element adjacent at least two of said edges, said carrier units being spaced apart from one another so that a central region of said one of said surfaces between said edge regions is not covered by said carrier units, at least some of the conductive features of said carrier units being electrically connected to at least some of said contacts;
- wherein said carrier units overlie edge regions of said front surface;
- and
- wherein said conductive features include conductors connected to said terminals, said conductors having contact ends remote from said terminals, said contacts of said microelectronic element being connected to said contact ends of said conductors.
2 more elements
A packaged microelectronic element comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent at least two of said edges;
- (b) a plurality of carrier units, each said carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the carrier units overlying edge regions of one of said surfaces of said microelectronic element adjacent at least two of said edges, said carrier units being spaced apart from one another so that a central region of said one of said surfaces between said edge regions is not covered by said carrier units, at least some of the conductive features of said carrier units being electrically connected to at least some of said contacts;
- wherein said carrier units overlie edge regions of said rear surface and project laterally beyond said microelectronic element.
A packaged microelectronic element comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent at least two of said edges;
- (b) a plurality of carrier units, each said carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the carrier units overlying edge regions of one of said surfaces of said microelectronic element adjacent at least two of said edges, said carrier units being spaced apart from one another so that a central region of said one of said surfaces between said edge regions is not covered by said carrier units, at least some of the conductive features of said carrier units being electrically connected to at least some of said contacts;
- wherein said carrier units project laterally outwardly beyond said microelectronic element, and wherein said terminals include rear-facing terminals exposed at the rear surfaces of said dielectric layers and forward-facing terminals exposed at the front surfaces of said dielectric layers, at least some of said terminals being disposed laterally outward of said microelectronic element.
A module comprising:
- a plurality of packaged microelectronic elements each comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent at least two of said edges;
- (b) a plurality of carrier units, each said carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the carrier units overlying edge regions of one of said surfaces of said microelectronic element adjacent at least two of said edges, said carrier units being spaced apart from one another so that a central region of said one of said surfaces between said edge regions is not covered by said carrier units, at least some of the conductive features of said carrier units being electrically connected to at least some of said contacts;
- said plurality of packaged microelectronic elements stacked in superposed relation to one another with the carrier units of one of said packaged microelectronic elements being disposed outside of a projected area defined by the microelectronic element and the carrier units of another one of said packaged microelectronic elements.
1 more element
A packaged microelectronic element comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent a first one of said edges;
- (b) a carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the carrier unit overlying an edge region of one of said surfaces of said microelectronic element adjacent said first edge, said carrier unit being configured so that regions of said one of said surfaces remote from said first edge are not covered by said carrier unit, at least some of the conductive features of said carrier unit being electrically connected to at least some of said contacts;
- wherein said one of said surfaces is the front surface of the microelectronic element and wherein the terminals on the carrier unit include forward-facing terminals exposed at the front surface of the dielectric layer.
A packaged microelectronic element comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent a first one of said edges;
- (b) a carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the carrier unit overlying an edge region of one of said surfaces of said microelectronic element adjacent said first edge, said carrier unit being configured so that regions of said one of said surfaces remote from said first edge are not covered by said carrier unit, at least some of the conductive features of said carrier unit being electrically connected to at least some of said contacts;
- wherein said edge region covered by said carrier unit has an area less than 25% of an area of said one of said surfaces.
A packaged microelectronic element comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent a first one of said edges;
- (b) a carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the carrier unit overlying an edge region of one of said surfaces of said microelectronic element adjacent said first edge, said carrier unit being configured so that regions of said one of said surfaces remote from said first edge are not covered by said carrier unit, at least some of the conductive features of said carrier unit being electrically connected to at least some of said contacts;
- wherein said one of said surfaces is the front surface of the microelectronic element, said carrier unit projects laterally beyond said first edge of said microelectronic element, and wherein said terminals include rear-facing terminals disposed laterally outward of said microelectronic element and exposed at said rear surface of said dielectric layer.
A packaged microelectronic element comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent a first one of said edges;
- (b) a carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the carrier unit overlying an edge region of one of said surfaces of said microelectronic element adjacent said first edge, said carrier unit being configured so that regions of said one of said surfaces remote from said first edge are not covered by said carrier unit, at least some of the conductive features of said carrier unit being electrically connected to at least some of said contacts;
- wherein said one of said surfaces is the rear surface of the microelectronic element, and wherein said carrier unit overlies a first edge region of said rear surface and projects laterally beyond said microelectronic element.
A packaged microelectronic element comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent a first one of said edges;
- (b) a carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the carrier unit overlying an edge region of one of said surfaces of said microelectronic element adjacent said first edge, said carrier unit being configured so that regions of said one of said surfaces remote from said first edge are not covered by said carrier unit, at least some of the conductive features of said carrier unit being electrically connected to at least some of said contacts;
- wherein said carrier unit projects laterally outwardly beyond said microelectronic element, and wherein said terminals include rear-facing terminals exposed at the rear surface of said dielectric layer and forward-facing terminals exposed at the front surface of said dielectric layer, at least some of said terminals being disposed laterally outward of said microelectronic element.
A module comprising:
- a plurality of packaged microelectronic elements each comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent a first one of said edges;
- (b) a carrier unit including a dielectric layer having front and rear surfaces and conductive features including terminals, the carrier unit overlying an edge region of one of said surfaces of said microelectronic element adjacent said first edge, said carrier unit being configured so that regions of said one of said surfaces remote from said first edge are not covered by said carrier unit, at least some of the conductive features of said carrier unit being electrically connected to at least some of said contacts;
- said plurality of packaged microelectronic elements stacked in superposed relation to one another with at least some of the terminals on the carrier unit of one of said packaged microelectronic elements being disposed outside of a projected area defined by the microelectronic element and the carrier unit of another one of said packaged microelectronic elements.
1 more element
A packaged microelectronic element comprising:
- (a) a microelectronic element having front and rear surfaces, edges bounding said surfaces and contacts exposed at said front surface adjacent a first one of said edges;
- (b) one or more carrier units including a dielectric layer having front and rear surfaces and conductive features including terminals, the one or more carrier units overlying one or more regions of one of said surfaces of said microelectronic element but not overlying other regions of said one of said surfaces, at least some of the conductive features of said one or more carrier units being electrically connected to at least some of said contacts, said one or more carrier units having a total surface area less than 50% of an area of said one of said surfaces.
Dependencies are inferred from the claim text.