Stack package and semiconductor module implementing the same
AssigneeSamsung Electronics Co., Ltd.
InventorTae-Sung Yoon
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AssigneeSamsung Electronics Co., Ltd.
InventorTae-Sung Yoon
Estimating the term…
About 1 year 10 months of term left · ends 11 Sep 2028 (estimated)
The stack package may have a structure in which unit packages may be inserted into slots of a receiving substrate. The unit package may have a plurality of connecting pads. The receiving substrate may have substrate pads, which may be electrically connected to the connecting pads of the unit packages inserted in the slots by mechanical contact. The slots may be provided at regular vertical intervals so that the unit packages may be stacked in the vertical direction. A semiconductor module may include stack packages installed on at least one surface of a module substrate.
A package comprising:
A package comprising:
Dependencies are inferred from the claim text.
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This U.S. non-provisional application claims benefit of priority under 35 U.S.C.§119 from Korean Patent Application No. 2005-60730, filed on Jul. 6, 2005, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
Example embodiments of the present invention relate to a semiconductor device and, more particularly, to a stack package having a plurality of unit packages that may be inserted into a receiving substrate to be stacked and electrically connected to each other, and a semiconductor module that may implement the same.
FIG. 1 is a cross sectional view of a conventional stack package.
FIG. 2 is a cross sectional view of a semiconductor module that may implement the conventional stack package of FIG. 1.
FIG. 3 is an exploded perspective view of a stack package according to an example embodiment of the present invention.
The drawings are provided for illustrative purposes only and are not drawn to scale. The spatial relationships and relative sizing of the elements illustrated in the various embodiments may be reduced, expanded and/or rearranged to improve the clarity of the figure with respect to the corresponding description. The figures, therefore, should not be interpreted as accurately reflecting the relative sizing or positioning of the corresponding structural elements that could be encompassed by an actual device manufactured according to the example embodiments of the invention.
Example, non-limiting embodiments of the present invention will be described in detail with reference to the accompanying drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the example embodiments set forth herein. Rather, the disclosed embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. The principles and features of this invention may be employed in varied and numerous embodiments without departing from the scope of the invention.
An element is considered as being mounted (or provided) “on” another element when mounted or provided) either directly on the referenced element or mounted (or provided) on other elements overlaying the referenced element. Throughout this disclosure, spatial terms such as “upper,” “lower,” “above” and “below” (for example) are used for convenience in describing various elements or portions or regions of the elements as shown in the figures. These terms do not, however, require that the structure be maintained in any particular orientation.
Package configurations
Package substrates; Interposers; Redistribution layers [RDL]: insulating or insulated package substrates; Interposers; Redistribution layers
Characterised by changes in properties of the bond wires during the connecting: changes in dispositions
Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps: bond pads specially adapted therefor
From the US filing history. Foreign family members aren’t listed.