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US 7,732,851 B2Granted
Method for fabricating a three-dimensional capacitor
AssigneeSamsung Electronics Co., Ltd.
InventorsJung-hyun Lee, Sung-ho Park, Sang-jun Choi
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Abstract
A capacitor and a method of fabricating the capacitor are provided herein. The capacitor can be formed by forming two or more dielectric layers and a lower electrode, wherein at least one of the two or more dielectric layers is formed before the lower electrode is formed.
Claims20
A three-dimensional capacitor, comprising:
- an inner electrode;
- a Group V metal oxide buffer layer on the inner electrode, wherein the buffer layer is tapered such that a thickness of the buffer layer varies gradually between a first edge of the inner electrode and a second edge of the inner electrode displaced laterally from the first edge of the inner electrode;
- a dielectric layer of tantalum oxide disposed on the buffer layer;
- and
- an outer electrode disposed on the dielectric layer.
2 more elements
A memory device comprising:
- a substrate;
- a memory cell arranged on the substrate;
- and
- a three-dimensional capacitor,
- wherein the three-dimensional capacitor comprises:
- an inner electrode;
- a Group V metal oxide buffer layer on the inner electrode,
- wherein the buffer layer is tapered such that a thickness of the buffer layer varies gradually between a first edge of the inner electrode and a second edge of the inner electrode;
- a dielectric layer of tantalum oxide disposed on the buffer layer;
- and
- an outer electrode disposed on the dielectric layer.
8 more elements
Dependencies are inferred from the claim text.