Pixel sensor with reduced image lag
AssigneeInternational Business Machines Corporation
InventorsJames W Adkisson, Jeffrey P. Gambino, Rajendran Krishnasamy, Solomon Mulugeta
Life of this patent
Estimating the term…
Loading patent…
AssigneeInternational Business Machines Corporation
InventorsJames W Adkisson, Jeffrey P. Gambino, Rajendran Krishnasamy, Solomon Mulugeta
Estimating the term…
A tensile-stress-generating structure is formed above a gate electrode in a CMOS image sensor to apply a normal tensile stress between a charge collection well of a photodiode, which is also a source region of a transfer transistor, and a floating drain in the direction connecting the source region and the floating drain. The tensile stress lowers the potential barrier between the source region and the body of the transfer transistor to effect a faster and more through transfer of the electrical charges in the source region to the floating drain. Image lag is thus reduced in the CMOS image sensor. Further, charge capacity of the source region is also enhanced due to the normal tensile stress applied to the source region.
A semiconductor structure comprising:
A method of forming a semiconductor structure comprising:
A design structure embodied in a machine readable medium for designing, manufacturing, or testing a design, said design structure comprising:
Dependencies are inferred from the claim text.