Methods of forming phase changeable layers including protruding portions in electrodes thereof

A method of forming a structure in a phase changeable memory cell, comprising:

• forming a bottom electrode having an interlayer dielectric layer thereon, the bottom electrode having a recess therein that extends beyond a boundary between the bottom electrode and the interlayer dielectric;
• and
• forming a phase changeable layer in the recess including a protruding potion of the phase changeable layer that protrudes into the bottom electrode beyond the boundary, wherein forming a bottom electrode further comprises:
• forming the interlayer dielectric layer on the bottom electrode;
• isotropically etching the interlayer dielectric layer to form a mouth of the contact hole having a mouth width;
• and
• anisotropically etching the interlayer dielectric layer though the mouth of the contact hole to beyond the boundary to form the recess in the bottom electrode a recess width that is less than the mouth width.

A method of fabricating a phase changeable memory cell, comprising:

• forming a plurality of bottom electrodes on a silicon substrate;
• forming a interlayer dielectric layer on the semiconductor substrate having the bottom electrodes;
• patterning the interlayer dielectric layer to form a plurality of contact holes exposing a portion of the bottom electrodes, respectively,
• etching the bottom electrodes exposed in the contact holes to predetermined depth;
• and
• forming a plurality of data storage elements on the interlayer dielectric layer, the data storage element is filled in the contact hole and the etched region of the bottom electrode to connect with the bottom electrode, wherein forming the contact holes comprising:
• isotropic etching a portion of the interlayer dielectric layer to form recess regions over the bottom electrodes;
• and
• anisotropic etching the interlayer dielectric layer at the recess regions to form contact holes exposing a portion of each bottom electrode, respectively,
• wherein exposed region of the bottom electrode is formed to an width which is narrower than that of the recess region.

A method of fabricating a phase changeable memory cell, comprising:

• forming a plurality of bottom electrodes on a silicon substrate;
• forming a interlayer dielectric layer on the semiconductor substrate having the bottom electrodes;
• patterning the interlayer dielectric layer to form a plurality of contact holes exposing a portion of the bottom electrodes, respectively,
• etching the bottom electrodes exposed in the contact holes to predetermined depth;
• and
• forming a plurality of data storage elements on the interlayer dielectric layer, the data storage element is filled in the contact hole and the etched region of the bottom electrode to connect with the bottom electrode, wherein forming the contact holes comprising:
• isotropic etching a portion of the interlayer dielectric layer to form recess regions over the bottom electrodes;
• and
• anisotropic etching the interlayer dielectric layer at the recess regions to form contact holes exposing a portion of each bottom electrode, respectively,
• wherein forming the contact holes comprising:
• forming a photo resist pattern on the interlayer dielectric layer, wherein the photo resist pattern is formed to expose a portion of the interlayer dielectric layer over each of the bottom electrodes;
• isotropic etching a portion of the interlayer dielectric layer using the photo resist pattern as etch mask to form recess regions;
• anisotropic etching the interlayer dielectric layer using the photo resist pattern to form a portion of each bottom electrodes;
• and
• removing the photo resist pattern.

A method of fabricating a phase changeable memory cell, comprising:

• forming a plurality of bottom electrodes on a silicon substrate;
• forming a interlayer dielectric layer on the semiconductor substrate having the bottom electrodes;
• patterning the interlayer dielectric layer to form a plurality of contact holes exposing a portion of the bottom electrodes, respectively,
• etching the bottom electrodes exposed in the contact holes to predetermined depth;
• and
• forming a plurality of data storage elements on the interlayer dielectric layer, the data storage element is filled in the contact hole and the etched region of the bottom electrode to connect with the bottom electrode, wherein forming the contact holes comprising:
• isotropic etching a portion of the interlayer dielectric layer to form recess regions over the bottom electrodes;
• and
• anisotropic etching the interlayer dielectric layer at the recess regions to form contact holes exposing a portion of each bottom electrode, respectively,
• wherein forming the data storage electrodes:
• forming a phase changeable layer, which is filled in the contact hole and the etched regions of the bottom electrodes, over an entire surface of the substrate having the contact holes;
• forming a conductive layer on the phase changeable layer;
• sequentially patterning the conductive layer and the phase changeable layer to form phase changeable patterns respectively connected with the bottom electrode and upper electrodes over the phase changeable patterns.