Formation of through-wafer electrical interconnections and other structures using a thin dielectric membrane
AssigneeHymite A/S
InventorLior Shiv
Life of this patent
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Abstract
Providing through-wafer interconnections in a semiconductor wafer includes forming a sacrificial membrane in a preexisting semiconductor wafer, depositing metallization over one side of the wafer so as to cover exposed portions of the sacrificial membrane facing the one side of the wafer, removing exposed portions of the sacrificial membrane facing the other side of the wafer, and depositing metallization over the other side of the wafer so as to contact the previously deposited metallization. Techniques also are disclosed for providing capacitive and other structures using thin metal membranes.
Claims7
A method of fabricating a package that houses a micro component, the method comprising:
- forming a sacrificial membrane in a pre-existing semiconductor wafer;
- depositing metallization over a first side of the wafer so as to cover exposed portions of the sacrificial membrane facing the first side of the wafer;
- removing exposed portions of the sacrificial membrane facing a second side of the wafer so that at least a portion of the metallization forms a metal membrane;
- using at least a portion of the semiconductor wafer with the metal membrane as part of the package to house the micro component;
- and
- using the metal membrane to evaluate the hermeticity of the package.
Dependencies are inferred from the claim text.