Processor array arrangement controlled by control computer
AssigneeInfineon Technologies AG
InventorsThomas Sturm, Rupert Glaser, Christl Lauterbach, Annelie Sohr, Werner Weber, Frank Schliep
Life of this patent
Estimating the term…
Loading patent…
AssigneeInfineon Technologies AG
InventorsThomas Sturm, Rupert Glaser, Christl Lauterbach, Annelie Sohr, Werner Weber, Frank Schliep
Estimating the term…
A processor arrangement having a plurality of processor units and a control computer. Each of the processor units is connected to at least one adjacent processor unit and has one control element and at least one communications interface for providing a data communications link with an adjacent processor unit. The control computer is connected to one of the processor units, and is configured for exchanging information with the processor unit and for assigning one control element of the plurality of control elements to a device that is electrically connected to the processor arrangement for the control of the device.
A processor arrangement, comprising:
A processor arrangement, comprising:
A processor arrangement, comprising:
A method for controlling a device by means of a processor arrangement electrically connected to the device, the processor arrangement including a plurality of processor units, each of which is connected to at least one adjacent processor unit, and has one control element and at least one communications interface for providing a data communications link with an adjacent processor unit, and a control computer connected to one of the processor units, the method comprising:
A method for controlling a device by means of a processor arrangement electrically connected to the device, the processor arrangement including a plurality of processor units, each of which is connected to at least one adjacent processor unit and has one control element and at least one communications interface for providing a data communications link with an adjacent processor unit, and a control computer connected to one of the processor units, the control computer including a memory for storing an address of one control element of the plurality of processor units, with the address uniquely identifying the control element, the method comprising:
A processor arrangement, comprising:
A method for controlling a device by means of a processor arrangement electrically connected to the device, the processor arrangement including a plurality of processor units, each of which is connected to at least one adjacent processor unit, and has one control element and at least one communications interface for providing a data communications link with an adjacent processor unit, and a control computer connected to one of the processor units, the method comprising:
A processor arrangement, comprising:
Dependencies are inferred from the claim text.