Leakage compensation during program and read operations
AssigneeMicron Technology, Inc.
InventorFrankie F. Roohparvar
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorFrankie F. Roohparvar
Estimating the term…
Methods of operating a memory and a memory are disclosed, such as an analog non-volatile memory device and process that reduces the effects of charge leakage from data cache capacitors, maintaining stored charge levels as data. In one embodiment, data values are compensated for leakage that is uniform across the data cache by charging a reference capacitor or initiating another leakage model and uniformly adjusting the ground of the data capacitors by the effect amount or by adjusting an amplifier offset or gain. In another embodiment, held data values are compensated for charge leakage effects that are non-uniform due to data values being sequentially transferred into the data cache by scaling a ground node or adjustment of amplifier offset/gain of each capacitor in the data cache against the leakage reference and the order in which data was transferred into the data cache.
A method of operating a memory, comprising:
A non-volatile memory, comprising:
A method of operating a memory, comprising:
A non-volatile memory, comprising:
A method of operating a memory, comprising:
Dependencies are inferred from the claim text.