2N-point and N-point FFT/IFFT dual mode processor

A 2N-point and N-point FFT (fast Fourier transform)/IFFT (inverse fast Fourier transform) dual mode processor comprising:

• a controller for outputting a corresponding control signal when an operation is a 2N-point FFT operation and outputting a corresponding control signal when an operation is an N-point FFT operation;
• a butterfly operator for receiving 2N data (x[N−1] . . . x[0], x[2N−1] . . . x[N]) to perform a butterfly operation when receiving a 2N-point FFT operation control signal from the controller;
• first and second MUXs for receiving results from the butterfly operator to output the received results in an increment of N when receiving a 2N-point FFT operation control signal from the controller, and respectively receiving different N data (x[N−1] . . . x[0] and x[N−1]′ . . . x[0]′) to output the same when receiving an N-point FFT operation control signal from the controller;
• a first N-point FFT processor for N-point FFT-operating on outputs from the first MUX to output even-numbered results of the 2N-point FFT when receiving a 2N-point FFT operation control signal from the controller, and N-point FFT-operating on outputs from the first MUX to output the same when receiving a N-point FFT operation control signal from the controller;
• and
• a second N-point FFT processor for N-point FFT-operating on outputs from the second MUX to output odd-numbered results of the 2N-point FFT when receiving a 2N-point FFT operation control signal from the controller, and N-point FET-operating on outputs from the second MUX to output the same when receiving a N-point FFT operation control signal from the controller.