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AssigneeElpida Memory, Inc.
InventorsMitsuaki Katagiri, Satoshi Nakamura, Takashi Suga, Satoshi Isa, Yoji Nishio, Seiji Funaba, Yukitoshi Hirose
Estimating the term…
A method for designing a semiconductor apparatus comprising a semiconductor package in consideration of power integrity for a semiconductor chip included in the semiconductor package is disclosed. A target variable for an adjustment target is calculated on the basis of target information about the adjustment target, wherein the target variable is represented in frequency domain, and the adjustment target includes a part of the semiconductor package. The target variable is compared with a predetermined constraint, which is represented in frequency domain, to identify a problematic section, wherein the problematic section corresponds to a frequency region at which the target variable exceeds the predetermined constraint. Design guidelines are decided to solve the identified problematic section.
A computer-implemented method for improving a design for a semiconductor apparatus comprising a semiconductor package in consideration of power integrity for a semiconductor chip included in the semiconductor package, the semiconductor chip comprising a power supply pad and a ground pad, the semiconductor package comprising, in addition to the semiconductor chip, a power supply terminal, a ground terminal and electrical paths electrically connecting between the power supply pad and the power supply terminal and between the ground pad and the ground terminal, respectively, the method comprising:
A system for aiding to design a semiconductor apparatus comprising a semiconductor package in consideration of power integrity for a semiconductor chip included in the semiconductor package, the semiconductor chip comprising a power supply pad and a ground pad, the semiconductor package comprising, in addition to the semiconductor chip, a power supply terminal, a ground terminal and electrical paths electrically connecting between the power supply pad and the power supply terminal and between the ground pad and the ground terminal, respectively, the system comprising:
A system comprising a bus system, a processor connected to the bus system and a memory connected to the bus system, the memory storing a computer program that, when executed by the processor, causes the processor to perform predetermined operations to aid to design a semiconductor apparatus comprising a semiconductor package in consideration of power integrity for a semiconductor chip included in the semiconductor package, the semiconductor chip comprising a power supply pad and a ground pad, the semiconductor package comprising, in addition to the semiconductor chip, a power supply terminal, a ground terminal and electrical paths electrically connecting between the power supply pad and the power supply terminal and between the ground pad and the ground terminal, respectively, the predetermined operations comprising:
A computer readable storage medium comprising instructions which when executed by a computer for aiding to design a semiconductor apparatus comprising a semiconductor package in consideration of power integrity for a semiconductor chip included in the semiconductor package, the semiconductor chip comprising a power supply pad and a ground pad, the semiconductor package comprising, in addition to the semiconductor chip, a power supply terminal, a ground terminal and electrical paths electrically connecting between the power supply pad and the power supply terminal and between the ground pad and the ground terminal, respectively, the instructions cause the computer to perform a method comprising:
Dependencies are inferred from the claim text.