Method and apparatus for injecting transient hardware faults for software testing

A method, comprising:

• applying selection data to a first register, the selection data adapted for controlling at least one of:
• a first plurality of data selection devices adapted for controlling propagation of data to functional logic of the circuit device;
• and
• a second plurality of data selection devices adapted for controlling propagation of data to output logic of the circuit device;
• and
• applying dynamic fault data to a second register, the dynamic fault data adapted for being provided, in a controlled manner based on the selection data, to at least one of the functional logic of the circuit device and the output logic of the circuit device;
• wherein the selection data and dynamic fault data is applied in a manner for providing a dynamic fault on at least one of the functional logic and the output logic.

An apparatus for injecting dynamic faults in a circuit device, comprising:

• a first register adapted to receive selection data adapted for individually controlling each of a plurality of data selection devices;
• a second register adapted to receive dynamic fault data for injection into logic of the circuit device based on control of the data selection devices using the selection data;
• and
• a controller for applying the selection data to the first register and the dynamic fault data to the second register in a manner for providing a dynamic fault in the logic of the circuit device.

An apparatus for injecting dynamic fault data into logic of a circuit device, comprising:

• a first circuit adapted to receive selection data adapted for controlling injection of the dynamic fault data into the logic of the circuit device;
• a second circuit adapted to receive the dynamic fault data for injection into the logic of the circuit device based on the selection data;
• and
• a controller for applying the selection data to the first circuit and the dynamic fault data to the second circuit in a manner for providing a dynamic fault in the logic of the circuit device.