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US 7,689,855 B2Granted
Clock supplying apparatus and control method thereof
AssigneeCanon Kabushiki Kaisha
InventorNaoto Yamada
Life of this patent
Estimating the term…
Abstract
A clock supplying apparatus capable of suppressing a current fluctuation as much as possible when supply of a clock signal to a circuit block is started or stopped. At start or termination of the clock signal supply to the circuit block, the clock signal frequency is temporarily changed to a low frequency lower than a standard frequency.
Claims14
A clock supplying apparatus for supplying a clock signal to at least one circuit block, comprising:
- a generation unit that generates the clock signal;
- a control unit that controls a frequency of the clock signal generated by said generation unit;
- and
- a switching unit that switches between a first supply state and a second supply state, the first supply state being a state in which the generated clock signal is supplied to the circuit block, the second supply state being a state in which the generated clock signal is not supplied to the circuit block;
- wherein, when said switching unit switches the supply state, said control unit controls the frequency of the clock signal so as to be temporarily lowered to a frequency corresponding to an amount of power consumption during the switching of the circuit block for which the supply state is to be switched.
2 more elements
A control method for a clock supplying apparatus that supplies a clock signal to at least one circuit block, comprising:
- a control step of controlling a frequency of a clock signal generated by a generation unit;
- and
- a switching step of switching between a first supply state and a second supply state, the first supply state being a state in which the generated clock signal is supplied to the circuit block, the second supply state being a state in which the generated clock signal is not supplied to the circuit block,
- wherein, when said switching step switches the supply state, said control step controls the frequency of the clock signal so as to be temporarily lowered to a frequency corresponding to an amount of power consumption during the switching of the circuit block for which the supply state is to be switched.
1 more element
Dependencies are inferred from the claim text.