Reduction of power consumption by throttling processor requests
AssigneeATI Technologies ULC
InventorStanislav Sokorac
Life of this patent
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Abstract
In an electronic device including a processor interface and a processor interconnected to the processor interface by a bus, activity on the bus is monitored and in response to inactivity, the processor interface is placed in a lower power consumption mode. While in the lower power consumption mode, processor requests to the processor interface are inhibited.
Claims22
A method of operating an electronic device having a processor, in communication with a processor interface by way of a processor bus, said method comprising:
- monitoring activity on said processor bus, while said processor interface is in a higher power consumption mode;
- after a first time period, for which no activity is detected on said processor request bus, placing said processor interface in a lower power consumption mode while maintaining a current power consumption mode of said processor;
- and
- while said processor interface is in said lower power consumption mode, and said processor is in said current power consumption mode, providing to said processor a signal inhibiting processor requests to said processor interface from being placed on said processor bus thereby allowing said processor interface to assume its lower power consumption mode without altering said current power consumption mode of said processor.
A method of operating an electronic device having a processor, a processor bus and a processor interface, said method comprising:
- monitoring activity on said processor bus;
- placing said processor interface in a lower power consumption mode while maintaining a current power consumption mode of said processor, in response to detecting inactivity on said processor bus for a first defined period;
- and
- queuing processor requests and inhibiting processor requests to said interface when said interface is in said lower power consumption mode.
An electronic device comprising:
- a processor;
- a bus interface in communication with said processor via a processor bus;
- a power controller for said bus interface, said power controller comprising:
- a bus monitor;
- a timer;
- a power control block, for placing at least portions of said bus interface in a lower power consumption mode;
- and
- a control signal generator for generating a signal to block processor requests from being placed on said processor bus;
- said power control block in communication with said bus monitor, said timer and said control signal generator, to place portions of said bus interface in said lower power consumption mode without altering a current power consumption mode of said processor;
- and to cause said control signal generator to inhibit processor requests while said processor is in said current power consumption mode, in response to said bus monitor monitoring inactivity on said processor bus for a defined period.
A portable electronic device comprising:
- a processor;
- a processor interface in communication with said processor by way of a processor bus;
- and
- a power controller operable to detect said processor bus idling for a first period of time, and in response temporarily transition said processor interface from a higher power consumption mode to a lower power consumption mode for a second period of time, while inhibiting new processor requests from being placed on said processor bus, without altering a current power consumption mode of said processor.
A power controller for a bus interface, said power controller comprising:
- a bus monitor for monitoring a processor bus interconnecting said bus interface to said processor;
- a timer;
- a power control block, for placing at least portions of said bus interface in a lower power consumption mode without altering a current power consumption mode of said processor;
- and
- a control signal generator for generating a signal to block processor requests from being placed on said processor bus;
- said power control block in communication with said bus monitor, said timer and said control signal generator, to place portions of said bus interface in said lower power consumption mode and to cause said control signal generator to inhibit processor requests without altering said current power consumption mode of said processor, in response to said bus monitor monitoring inactivity on said processor bus for a defined time period.
Dependencies are inferred from the claim text.