Method and apparatus for enforcing membar instruction semantics in an execute-ahead processor
AssigneeSun Microsystems, Inc.
InventorsPaul Caprioli, Shailender Chaudhry, Marc Tremblay
Life of this patent
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Abstract
Embodiments of the present invention provide a system that facilitates executing a memory barrier (membar) instruction in an execute-ahead processor, wherein the membar instruction forces buffered loads and stores to complete before allowing a following instruction to be issued.
Claims16
An apparatus for executing a membar instruction in an execute-ahead processor, wherein the membar instruction forces buffered loads and stores to complete before allowing any following loads or stores to complete, comprising:
- a processor;
- an execution mechanism within the processor configured to issue instructions for execution in a normal-execution mode, and further configured to enter an execute-ahead mode if, while issuing instructions for execution in the normal-execution mode, an instruction cannot be executed because of an unresolved data dependency;
- wherein while issuing instructions for execution in the execute-ahead mode, instructions that cannot be executed because of an unresolved data dependency are deferred by placing the instructions in a deferred queue, and non-deferred instructions are executed in program order;
- wherein, upon encountering a membar instruction while issuing instructions for execution in the normal-execution mode, the execution mechanism is configured to determine if either a load buffer or a store buffer is non-empty and, if so, the execution mechanism is further configured to:
- defer the membar instruction by placing the membar instruction in the deferred queue;
- execute subsequent instructions in the execute-ahead mode;
- and
- defer all load and store instructions encountered by the execution mechanism in execute-ahead mode after deferring the membar instruction by placing these instructions in the deferred queue in program order following the membar instruction;
- and
- wherein the execution mechanism is configured to initialize a stores-after-launch counter upon each entry to execute-ahead mode that is caused by an unresolved data dependency other than the membar instruction, wherein the stores-after-launch counter is incremented for each store encountered while the processor is executing in execute-ahead mode, and wherein the stores-after-launch counter is not decremented after the stores-after-launch counter is initialized upon each entry to execute-ahead mode that is caused by an unresolved data dependency other than the membar instruction;
- when all stores and loads that precede the membar instruction have been committed to memory from the store buffer and the load buffer, the execution mechanism is configured to enter a deferred mode, wherein the execution mechanism executes the deferred instructions including the membar instruction;
- and
- if all deferred instructions are executed in the deferred mode, the mechanism is configured to return to the normal-execution mode to resume normal program execution from the point where the execute-ahead mode left off.
A computer system for executing a membar instruction in an execute-ahead processor, wherein the membar instruction forces buffered loads and stores to complete before allowing any following loads or stores to complete, comprising:
- a processor;
- a memory;
- an execution mechanism within the processor configured to issue instructions for execution in a normal-execution mode, and further configured to enter an execute-ahead mode if, while issuing instructions for execution in the normal-execution mode, an instruction cannot be executed because of an unresolved data dependency;
- wherein while issuing instructions for execution in the execute-ahead mode, instructions that cannot be executed because of an unresolved data dependency are deferred by placing the instructions in a deferred queue, and non-deferred instructions are executed in program order;
- wherein, upon encountering a membar instruction while issuing instructions for execution in the normal-execution mode, the execution mechanism is configured to determine if either a load buffer or a store buffer is non-empty and, if so, the execution mechanism is configured to:
- defer the membar instruction by placing the membar instruction in the deferred queue;
- execute subsequent instructions in the execute-ahead mode;
- and
- defer all load and store instructions encountered by the execution mechanism in execute-ahead mode after deferring the membar instruction by placing these instructions in the deferred queue in program order following the membar instruction;
- and
- wherein the execution mechanism is configured to initialize a stores-after-launch counter upon each entry to execute-ahead mode that is caused by an unresolved data dependency other than the membar instruction, wherein the stores-after-launch counter is incremented for each store encountered while the processor is executing in execute-ahead mode, and wherein the stores-after-launch counter is not decremented after the stores-after-launch counter is initialized upon each entry to execute-ahead mode that is caused by an unresolved data dependency other than the membar instruction;
- when all stores and loads that precede the membar instruction have been committed to memory from the store buffer and the load buffer, the execution mechanism is configured to enter a deferred mode, wherein the execution mechanism executes the deferred instructions including the membar instruction;
- and
- if all deferred instructions are executed in the deferred mode, the mechanism is configured to return to the normal-execution mode to resume normal program execution from the point where the execute-ahead mode left off.
A method for executing a membar instruction in an execute-ahead processor, wherein the membar instruction forces buffered loads and stores to complete before allowing any following loads or stores to complete, comprising:
- issuing instructions for execution in a normal-execution mode;
- if, while issuing instructions for execution in the normal-execution mode, an instruction cannot be executed because of an unresolved data dependency, entering an execute-ahead mode, wherein instructions that cannot be executed because of an unresolved data dependency are deferred by placing the instructions in a deferred queue, and wherein non-deferred instructions are executed in program order;
- upon encountering a membar instruction while issuing instructions for execution in the normal-execution mode, determining if either a load buffer or a store buffer is non-empty and, if so, deferring the membar instruction by placing the membar instruction in the deferred queue and executing subsequent instructions in the execute-ahead mode;
- deferring all load and store instructions encountered by the execution mechanism in execute-ahead mode after deferring the membar instruction by placing these instructions in the deferred queue in program order following the membar instruction;
- initializing a stores-after-launch counter upon each entry to execute-ahead mode that is caused by an unresolved data dependency other than the membar instruction;
- incrementing the stores-after-launch counter for each store encountered while the processor is executing in execute-ahead mode;
- when all stores and loads that precede the membar instruction have been committed to memory from the store buffer and the load buffer during the execute-ahead mode, entering a deferred mode, wherein the processor executes the deferred instructions including the membar instruction;
- and
- if all deferred instructions are executed in deferred mode, returning to the normal-execution mode to resume normal program execution from the point where the execute-ahead mode left off;
- wherein the stores-after-launch counter is not decremented after the stores-after-launch counter is initialized upon each entry to execute-ahead mode that is caused by an unresolved data dependency other than the membar instruction.
Dependencies are inferred from the claim text.