Systems and methods for data transfer
AssigneeL-3 Communications Intergrated Systems, L.P.
InventorsJerry W. Yancey, Yea Z. Kuo
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AssigneeL-3 Communications Intergrated Systems, L.P.
InventorsJerry W. Yancey, Yea Z. Kuo
Estimating the term…
Application Specific Integrated Circuit (“ASIC”) devices, such as Field Programmable Gate Arrays (“FPGAs”), may be interconnected using serial I/O connections, such as high speed multi-gigabit serial transceiver (“MGT”) connections. For example, serial I/O connections may be employed to interconnect a pair of ASICs to create a high bandwidth, low signal count connection, and in a manner so that any given pair of multiple ASIC devices on a single circuit card may communicate with each other through no more than one serial data communication link connection step. A reconfigurable hardware architecture (“RHA”) may be configured to include a communications infrastructure that uses a high-bandwidth packet router to establish standard communications protocols between multiple interfaces and/or multiple devices that may be present on a single circuit card. Additionally, a communications infrastructure may be established across multiple circuit cards.
Circuitry comprising an ASIC device, said ASIC device comprising:
Circuitry comprising an ASIC device, said ASIC device comprising:
A method for data transfer, said method comprising transferring at least one data packet between a first function or module of an ASIC device and a second function or module of said ASIC device using a packet router of said ASIC device, said packet router being coupled between said first function or module of said ASIC device and said second function or module of said ASIC device;
Dependencies are inferred from the claim text.