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US 7,689,751 B2Granted
PCI-express system
AssigneeSun Microsystems, Inc.
InventorJohn R. Feehrer
Life of this patent
Estimating the term…
Abstract
A method and system to facilitate Peripheral Component Interconnect Express (PCIe). The PCIe may be facilitated in such as way as to limit pins consumed by a Root Complex, switch, or other chipset included on the same die a central processing unit (CPU). A slot interface card (SIC) or other devices having less expensive pins may be used to connect to and communicate with the slot.
Claims17
A method of facilitating Peripheral Component Interconnect Express (PCIe), the method comprising:
- configuring a Vendor Specific Enhanced Capabilities (VSEC) structure included within PCIe configuration space of a Root Complex to set bits for one or more Root Complex registers configured to support PCIe operations with a PCIe device;
- setting one or more of the Root Complex registers to support PCIe operations with signals communicated from the VSEC structure over signal paths restricted to the Root Complex;
- communicating register signals reflective of at least portion of bits set for the Root Complex registers and needed to support the PCIe operations to a PCIe device without communicating the signals over registers pins dedicated to the Root Complex registers;
- and
- communicating the register signals over pins connected to one or more shadow registers having settings that mirror the settings of one or more of the Root Complex registers.
2 more elements
A PCIe system comprising:
- a Root Complex having a number of registers configured to support PCIe operations for a slot having a PCIe device;
- a slot interface chip (SIC) connected to the slot and having shadow registers for Root Complex registers that are required to communicate with the slot;
- software configured to shadow values in the Root Complex registers within the corresponding shadow registers, the shadow registers thereby mirroring the Root Complex registers so that PCIe operations intended to be executed through the Root Complex registers are instead executed through the shadow registers connected to the slot;
- and
- wherein the Root Complex includes a VSEC hardwired to the Root Complex registers such that changes in the either of the VSEC or Root Complex registers are automatically reflected in the other, wherein the privileged software is configured to:
- instruct the VSEC to write changes in the shadow register to the Root Complex registers if the shadow registers change in response to slot changes;
- and
- write changes in the Root Complex registers to the shadow registers in response to the VSEC detecting the changes in the Root Complex registers, where those changes are made by operating system software.
5 more elements
A method of facilitating Peripheral Component Interconnect Express (PCIe), the method comprising:
- shadowing Root Complex registers with shadow Root Complex registers connected to PCIe device so that a PCIe device controller interacts with the Root Complex registers as if the Root Complex registers are connected to and communicated with the PCIe device while the PCIe device is actually connected to and communicating with the shadow Root Complex registers;
- and
- connecting PCIe devices only to pins dedicated to the shadow Root Complex register.
Dependencies are inferred from the claim text.