Back to results
US 7,689,635 B2Granted
Area efficient shift / rotate system
AssigneeSTMicroelectronics Pvt. Ltd.
InventorsShalini Gupta, Sumanta Sarkar
Life of this patent
Estimating the term…
Abstract
An area efficient data shifter/rotator using a barrel shifter. The invention is a circuit, which uses a single barrel shifter and is controllable to implement either a left or right shift or rotation of bits of a digital data word. The circuit is dynamically controllable to implement left or right shift of bits of the digital data word (both logical and arithmetic) and rotation (to the left or right) of bits of the word. The proposed circuit produces the required output in a single cycle.
Claims9
An area efficient shift/rotate system, comprising:
- a series arrangement of shifter stages connected in series, each shifter stage having a plurality of multiplexers equal to the number of inputs bits and additional circuitry at the input to each shifter stage, wherein, for each shifter stage of the series arrangement, said additional circuitry has 2m−1 multiplexers, where m is the stage number of said series arrangement;
- an input reversal circuit receiving the inputs bits and providing outputs to a first shifter stage of the series arrangement;
- an output reversal circuit connected to the output of a last shifter stage of said series arrangement, and
- a right arithmetic control logic having its output connected to inputs of the additional circuit of each of the shifter stages.
1 more element
A shift/rotate system, comprising:
- a shifter unit including shifter stages connected in series, each shifter stage including a plurality of multiplexers equal to the number of input bits and additional circuitry connected to inputs of the multiplexers in respective shifter stages, the additional circuitry for each shifter stage including 2m−1 multiplexers, where m is a stage number of the shifter stage;
- an input reversal circuit receiving the input bits and selectively providing, in response to a control signal, the input bits or reversed input bits to a first shifter stage of the shifter unit;
- an output reversal circuit receiving output bits of a last shifter stage of the shifter unit and selectively providing, in response to the control signal, the output bits or reversed output bits as an output of the shift/rotate system;
- and
- right arithmetic control logic having its output connected to inputs of the additional circuitry of each of the shifter stages.
2 more elements
Dependencies are inferred from the claim text.