Technique for aging induced performance drift compensation in an integrated circuit
AssigneeTexas Instruments Incorporated
InventorsPalkesh Jain, Hugh Thomas Mair
Life of this patent
Estimating the term…
Abstract
An improved compensation circuit that compensates for lifetime performance drifts due to aging of integrated circuits to improve the circuit performance. In one example embodiment, this is achieved by applying a body bias voltage VBB to the integrated circuit to compensate for the lifetime performance drift due to hot carrier and NBTI induced aging.
Claims24
A processor-implemented method of compensating for product performance drift due to aging of an integrated circuit, comprising:
- determining a lifetime performance drift of the integrated circuit due to aging;
- computing a body bias voltage VBB required at each predetermined time interval until end of the integrated circuit lifetime based on the determined lifetime performance drift of the integrated circuit;
- measuring on-time of the integrated circuit;
- and
- applying an associated computed body bias voltage VBB to the integrated circuit at each predetermined time interval based on the measured on-time, which compensates for the effect of aging.
A software, firmware, or hardware implementable method for compensating for performance drift due to aging of an integrated circuit, comprising:
- obtaining operating frequency of the integrated circuit using an oscillator at each one of predetermined time intervals until end of an integrated circuit lifetime associated with the integrated circuit;
- comparing the obtained operating frequency at each predetermined time interval to beginning of life (BOL) operating frequency of the integrated circuit;
- and
- applying a body bias voltage VBB to the integrated circuit as a function of the comparison at each predetermined time interval to maintain the operating frequency of the integrated circuit substantially around the BOL operating frequency, which compensates for the performance drift due to aging.
A machine implemented method for compensating lifetime performance drift due to aging of one or more circuits disposed in an integrated circuit comprising:
- determining a lifetime performance drift of each circuit due to aging;
- computing a body bias voltage VBB required for each circuit at each one of predetermined time intervals until the end of circuit lifetime based on the determined lifetime performance drift;
- measuring on-time of each circuit;
- and
- applying an associated computed body bias voltage VBB to each circuit at each predetermined time interval based on the associated measured on-time, which compensates for the effect of aging.
An integrated circuit comprising:
- a circuit that has CMOS transistors whose lifetime performance can drift with age;
- a calculator circuit that determines on-time of the circuit;
- and
- a body bias generator that computes a body bias voltage VBB required at each one of predetermined time intervals until end of the circuit lifetime based on a lifetime performance drift of the circuit and wherein the body bias generator applies an associated computed body bias voltage VBB to the circuit at each predetermined time interval based on the measured on-time of the integrated circuit to compensate for the lifetime performance drift induced due to aging.
A semiconductor circuit comprising:
- a ring oscillator circuit that obtains operating frequency of the semiconductor circuit at predetermined time intervals until end of life of the semiconductor circuit, wherein the ring oscillator circuit compares the obtained operating frequency at each predetermined time interval to a beginning of life (BOL) operating frequency of the semiconductor circuit;
- and
- a body bias generator that applies a body bias voltage VBB to the semiconductor circuit as a function of the comparison so that the operating frequency of the semiconductor circuit remains substantially around the BOL operating frequency to compensate for the lifetime performance shift due to aging.
An integrated circuit comprising:
- one or more circuits;
- an aging assessment circuit that determines a lifetime performance drift of each circuit due to hot carrier and negative bias temperature instability (NBTI) induced aging;
- a body bias generator that computes body bias voltage VBB required at predetermined time intervals until the end of a circuit lifetime based on the determined lifetime performance drift for each circuit;
- and
- a calculator circuit that measures on-time of each circuit, and wherein the body bias generator applies an associated computed body bias voltage VBB to each circuit at each predetermined time interval based on the measured on-time to compensate for the lifetime performance drift due to hot carrier and NBTI induced aging.
Dependencies are inferred from the claim text.