Image processing method and image processing circuit
AssigneeFujitsu Microelectronics Limited
InventorKazuhiko Okada
Life of this patent
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Abstract
A method and circuit for suppressing the generation of unnatural vertical streaks in output image data. A detection processing circuit generates a first noise correction value based on first and second noise detection signals from an OB region. A correction processing circuit performs an offset process on a first noise correction value to generate a second noise correction value and performs an FIR filter process on the second noise correction value to generate a noise correction signal NC. The correction processing circuit then corrects the effective image signal from the effective image region using the noise correction signal and performs a horizontal LPF process on the corrected effective image signal to generate output image data.
Claims20
A method for performing noise correction using a pixel having a predetermined pixel value and arranged in an imaging region and a pixel having a predetermined pixel value and arranged in a non-imaging region, the method comprising:
- generating, by an image processing circuit, a first noise correction value based on the pixel value of the non-imaging region;
- determining a sign of the first noise correction value by the image processing circuit;
- generating, by the image processing circuit, a second noise correction value by subtracting a predetermined subtraction value from the first noise correction value when the sign of the first noise correction value is positive;
- generating, by the image processing circuit, the second noise correction value by adding a predetermined addition value to the first noise correction value when the sign of the first noise correction value is negative;
- and
- correcting, by the image processing circuit, the pixel value of the imaging region based on the second noise correction value.
An image processing circuit for connection to a solid state imaging device including an imaging region and a non-imaging region, the imaging region and the non-imaging region each including a pixel having a predetermined pixel value, the image processing circuit comprising:
- a detection processing circuit, connected to the solid state imaging device, for generating a first noise correction value based on the pixel value of the non-imaging region;
- a correction processing circuit, connected to the solid state imaging device and the detection processing circuit, for receiving the first noise correction value and for correcting the pixel value of the imaging region, wherein the correction processing circuit includes:
- an offset processor, connected to the detection processing circuit, for determining a sign of the first noise correction value, for generating a second noise correction value by subtracting a predetermined subtraction value from the first noise correction value when the sign of the first noise correction value is positive and for generating the second noise correction value by adding a predetermined addition value to the first noise correction value when the sign of the first noise correction value is negative;
- and
- a calculator, connected to the solid state imaging device and the offset processor, for correcting the pixel value of the imaging region based on the second noise correction value.
Dependencies are inferred from the claim text.