Methods and apparatus for asynchronous serial channel connections in communication systems

An integrated circuit device for use in a node of a communication system, the device comprising;

• a memory configured to store data written thereto by a receiver associated with the node in accordance with a receiver clock, wherein the data is read therefrom by a transmitter associated with the node in accordance with a transmitter clock;
• and
• a control logic circuit in communication with the memory, configured to send a first control signal to the transmitter to adjust a speed of the transmitter clock responsive to an operating condition of the memory;
• wherein the control logic circuit monitors data written by the receiver and data read by the transmitter through a data write pointer and a data read pointer, respectively;
• wherein the control logic circuit increases the speed of the transmitter clock when a distance between the data write pointer and the data read pointer reaches a first defined threshold, and decreases the speed of the transmitter clock when a distance between the data write pointer and the data read pointer reaches a second defined threshold;
• the device further comprising a sampling counter in communication with the control logic circuit configured to have the control logic circuit send a second control signal to adjust the speed of the transmitter clock when the sampling counter reaches a defined count and the distance between the data write pointer and the data read pointer has remained approximately the same.

A method, for use in a communication system having at least one node, for controlling a transmitter clock associated with the at least one node, the method comprising the steps of:

• writing data to a memory associated with the at least one node by a receiver associated with the at least one node in accordance with a receiver clock;
• reading data from the memory by a transmitter associated with the at least one node in accordance with a transmitter clock;
• sending a first control message from a control logic circuit associated with the at least one node in communication with the memory to the transmitter to adjust a speed of the transmitter clock responsive to a first operating condition of the memory;
• initializing a sampling counter substantially concurrently with the sending step;
• and
• making a further adjustment to the speed of the transmitter clock by sending a second control message responsive to the sampling counter reaching a defined count.

A computer-readable storage medium having embodied therein executable program code of one or more software programs, for use in a communication system having at least one node, the at least one node being operative under control of the one or more software programs to perform the steps of:

• writing data to a memory associated with the at least one node by a receiver associated with the at least one node in accordance with a receiver clock;
• reading data from the memory by a transmitter associated with the at least one node in accordance with a transmitter clock;
• sending a first control message from a control logic circuit associated with the at least one node in communication with the memory to the transmitter to adjust a speed of the transmitter clock, responsive to a first operating condition of the memory;
• initializing a sampling counter substantially concurrently with the sending step;
• and
• making a further adjustment to the speed of the transmitter clock by sending a second control message responsive to the sampling counter reaching a defined count.