Ultrasound imaging system

An ultrasound imaging system including a transducer array probe unit and a system console for processing and displaying image data, the probe unit comprising:

• an array of transducer elements arranged along a plane;
• a plurality of subarray circuit units each comprising a plurality of integrated circuits formed over one another in a stacked configuration, each circuit unit connected to multiple ones of the transducer elements;
• a multi-wiring unit providing electrical connections between transducer elements and circuit units and providing input/output signal connections between at least the one circuit unit and the system console;
• and
• a plurality of removable clamps, each clamp providing connections between one or more flexible circuits and the circuit board,
• wherein a first of the integrated circuits is positioned in a first plane and a second of the integrated circuits is positioned in a second plane parallel with the first plane, with the first integrated circuit including a plurality of bond pads formed along a surface thereof, with the circuit unit including bond wires extending from some of the bond pads on the first integrated circuit to the second circuit to provide connections between the first and second integrated circuits.

An ultrasound imaging system of the type having a probe unit and a system console connected to the probe unit through a cable, the system comprising:

• a plurality of transducer elements;
• a plurality of circuit units, each connected to multiple ones of the transducer elements, circuitry in each unit comprising a plurality of integrated circuits, with at least a first of the integrated circuits formed over a second of the integrated circuits in a stacked configuration;
• and
• a plurality of circuit board structures providing electrical connections between the transducer elements and the circuit units,
• with, for at least one of the circuit units, the first integrated circuit including a first plurality of first bond pads along a surface thereof and the second integrated circuit including a second plurality of second bond pads along a surface thereof, bond wires extending between pairs of first and second bond pads to provide input/output signal connections therebetween.