Methods of forming trench isolation and methods of forming arrays of FLASH memory cells

A method of forming trench isolation, comprising:

• providing isolation trenches within a semiconductor substrate
• depositing and solidifying a liquid within the isolation trenches to form a solidified dielectric within the isolation trenches, the solidified dielectric comprising carbon and silicon, the solidified dielectric comprising an elevationally outer portion and an elevationally inner portion within the isolation trenches;
• removing carbon from the outer portion of the solidified dielectric;
• after the removing, etching the solidified dielectric outer portion selective to and effective to expose the solidified dielectric inner portion, the solidified dielectric inner portion being retained;
• after the etching, removing carbon from the inner portion of the solidified dielectric;
• and
• after the etching and after removing carbon from the inner portion of the solidified dielectric, depositing dielectric material over the solidified dielectric inner portion to within the isolation trenches.

A method of forming trench isolation comprising:

• providing isolation trenches within a semiconductor substrate;
• depositing and solidifying a liquid within the isolation trenches to form a solidified dielectric within the isolation trenches, the solidified dielectric comprising carbon and silicon, the solidified dielectric comprising an elevationally outer portion and an elevationally inner portion within the isolation trenches;
• oxidizing the outer portion of the solidified dielectric and not the inner portion of the solidified dielectric to form the inner and outer portions to be of different compositions;
• after the oxidizing, using the different compositions of the inner and outer portions in etching the solidified dielectric outer portion selective to and effective to expose the solidified dielectric inner portion, the solidified dielectric inner portion being retained;
• after the etching, depositing dielectric material over the solidified dielectric inner portion to within the isolation trenches;
• and forming floating gate transistors of NAND unit cells of an array of NAND memory circuitry intermediate adjacent pairs of the isolation trenches.

A method of forming trench isolation comprising:

• providing isolation trenches within a semiconductor substrate;
• depositing and solidifying a liquid within the isolation trenches to form a solidified dielectric within the isolation trenches, the liquid comprising an organosiloxane, the solidified dielectric comprising an elevationally outer portion and an elevationally inner portion within the isolation trenches;
• removing carbon from the outer portion of the solidified dielectric and oxidizing the outer portion of the solidified dielectric while not removing carbon from the inner portion of the solidified dielectric and while not oxidizing the inner portion to form the inner and outer portions to be of different compositions, the removing and oxidizing comprising exposure to an oxygen-containing material, the carbon being removed from said outer portion to leave no more than 1.0 atomic percent carbon in said outer portion;
• after the removing and the oxidizing, using the different compositions of the inner and outer portions in etching the solidified dielectric outer portion selective to and effective to expose the solidified dielectric inner portion using an aqueous HF-comprising solution, the solidified dielectric inner portion being retained;
• after the etching, removing carbon from the inner portion of the solidified dielectric to leave no more than 1.0 atomic percent carbon in said inner portion;
• and
• after removing carbon from the inner portion, depositing dielectric material over the solidified dielectric inner portion to within the isolation trenches.

A method of forming an array of FLASH memory cells, comprising:

• forming a gate dielectric over a semiconductor substrate;
• forming floating gate material over the gate dielectric;
• forming trench isolation masking material over the floating gate material;
• forming a series of alternating active area rows and isolation trenches using the trench isolation masking material as a mask, said active area rows having said gate dielectric and floating gate material thereover;
• depositing and solidifying a liquid within the isolation trenches to form a solidified dielectric within the isolation trenches, the liquid comprising an organosiloxane, the solidified dielectric comprising carbon and silicon, the solidified dielectric comprising an elevationally outer portion and an elevationally inner portion within the isolation trenches
• removing carbon from the outer portion of the solidified dielectric and oxidizing the outer portion of the solidified dielectric and while not removing carbon from the inner portion of the solidified dielectric and while not oxidizing the inner portion to form the inner and outer portions to be of different compositions, the removing and oxidizing comprising exposure to an oxygen-containing material, the carbon being removed from said outer portion to leave no more than 1.0 atomic percent carbon in said outer portion;
• after the removing and the oxidizing, using the different compositions of the inner and outer portions in etching the solidified dielectric outer portion selective to and effective to expose the solidified dielectric inner portion using an aqueous HF-comprising solution, the solidified dielectric inner portion being retained;
• after the etching, removing carbon from the inner portion of the solidified dielectric to leave no more than 1.0 atomic percent carbon in said inner portion;
• after removing carbon from the inner portion, depositing dielectric material over the solidified dielectric inner portion to within the isolation trenches;
• removing the trench isolation masking material from over the floating gate material;
• and
• after removing the trench isolation masking material, forming control gate dielectric material and control gate material over the floating gate material.