Methods of forming solder connections and structure thereof

A method for reducing corrosion of under bump metallization material during formation of a solder bump on a semiconductor structure comprising:

• forming a passivated layer with a trench over at least a metallized layer within a structure;
• forming a first metal containing layer within the trench;
• controlling a size of at least a second metal containing layer by patterned resist;
• etching the patterned resist and portions of the first metal containing layer under the patterned resist, while protecting remaining portions of the first metal containing layer with the second metal containing layer;
• and
• reflowing solder material on the second metal containing layer to form a solder bump,
• wherein the first metal containing layer is substantially devoid of an undercut, controlled during the etching step.

A method for controlling dimensions of a solder bump during formation of the solder bump comprising:

• forming a resist pattern having at least one opening configured for solder bumps;
• electroplating a metal layer within the at least one opening;
• removing the resist pattern and a portion of an underlying metal layer, which is in contact with a metallized layer within a structure;
• providing solder material on the electroplated metal;
• and
• reflowing the solder material to form a solder bump extending within a trench structure formed in an underlying passivation layer.

A method comprising:

• sputtering a first metal containing layer onto a structure having a metal formation within the structure;
• forming a passivation layer having a trench in alignment with the metal formation;
• patterning a resist on the first metal containing layer to form opening to the first metal containing layer;
• electroplating a second metal containing layer in opening bound by the resist;
• removing the resist and the first metal layer underlying the resist, using the second metal containing layer as a mask;
• attaching solder material onto the second metal containing layer;
• and
• reflowing the solder material.