Method of forming solder bump on high topography plated Cu
AssigneeSTATS ChipPAC, Ltd.
InventorsYaojian Lin, Qing Zhang, Haijing Cao
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AssigneeSTATS ChipPAC, Ltd.
InventorsYaojian Lin, Qing Zhang, Haijing Cao
Estimating the term…
A solder bump is formed on a high-topography, electroplated copper pad integrating a first and second passivation layer. A sacrifice layer is deposited over the second passivation layer. The sacrifice layer is lithographically patterned. A via is etched in the sacrifice layer. A solder bump is formed in the via. A portion of the sacrifice layer is removed using the solder bump as a mask. A semiconductor device includes a substrate, an input/output (I/O) pad disposed over the substrate, a first passivation layer disposed over a portion of the I/O pad, a first conductive layer disposed over the first passivation layer, a second passivation layer disposed over the first conductive layer, a sacrifice layer disposed over the second passivation layer, the sacrifice layer having a via, and a solder bump formed in the via, the solder bump used as a mask to remove a portion of the sacrifice layer.
A method of making a semiconductor device, comprising:
A method of making a semiconductor device, comprising:
A method of making a semiconductor device, comprising:
Dependencies are inferred from the claim text.