Tunable gate electrode work function material for transistor applications

A method of forming a semiconductor device comprising:

• forming a gate electrode placeholder over a substrate;
• forming source/drain regions in the substrate and on either side of the gate electrode placeholder;
• forming a dielectric layer over the gate electrode placeholder and substrate;
• planarizing the dielectric layer to expose the gate electrode placeholder;
• removing the gate electrode placeholder to form a trench in the dielectric layer and to expose a portion of the substrate;
• forming a gate dielectric on the exposed portion of the substrate;
• forming an NMOS work function metal in contact with a first region of the gate dielectric to form an NMOS transistor;
• lining the trench with a metal carbonitride diffusion barrier, wherein the metal carbonitride diffusion barrier is in contact with a second region of the gate dielectric, contains approximately 30 at. % tantalum, 10-30 at. % carbon and 30-50 at % nitrogen, and has a work function of at least 4.8 eV to further form a PMOS work function metal of a PMOS transistor;
• and
• filling the trench with a metal cap, wherein the metal cap is on the metal carbonitride diffusion baffler.