Methods of forming NMOS/PMOS transistors with source/drains including strained materials
AssigneeSamsung Electronics Co., Ltd.
InventorsHo Lee, Tetsuji Ueno, Hwa-Sung Rhe
Life of this patent
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Abstract
A method of forming an integrated circuit includes selectively forming active channel regions for NMOS and PMOS transistors on a substrate parallel to a <100> crystal orientation thereof and selectively forming source/drain regions of the NMOS transistors with Carbon (C) impurities therein.
Claims26
A method of forming an integrated circuit comprising:
- selectively forming active channel regions for NMOS and PMOS transistors on a substrate parallel to a <100> crystal orientation thereof;
- and
- selectively forming source/drain regions of the NMOS transistors with Carbon (C) impurities therein.
A method of forming an integrated circuit comprising:
- selectively forming active channel regions for NMOS and PMOS transistors on a substrate parallel to a <100> crystal orientation thereof;
- and
- substituting Carbon (C) atoms for more than about 1% of Silicon (Si) atoms in source/drain regions of the NMOS transistors.
A method of forming an integrated circuit comprising:
- selectively forming active channel regions for NMOS and PMOS transistors on a substrate parallel to a <100> crystal orientation thereof;
- selectively epitaxially growing Carbon (C) doped silicon in source/drain regions associated with the active channel regions of the NMOS and PMOS transistors;
- and
- forming a tensile layer on the NMOS and PMOS transistors.
A method of forming an integrated circuit comprising:
- selectively forming active channel regions for NMOS and PMOS transistors on a substrate parallel to a <100> crystal orientation thereof;
- selectively epitaxially growing Carbon (C) doped silicon in source/drain regions associated only with the active channel regions of the NMOS transistors;
- and
- forming a tensile layer on the NMOS and PMOS transistors.
A method of forming an integrated circuit comprising:
- selectively forming active channel regions for NMOS and PMOS transistors on a substrate parallel to a <100> crystal orientation thereof;
- selectively epitaxially growing Carbon (C) doped silicon in source/drain regions associated with the active channel regions of the NMOS transistors;
- selectively epitaxially growing Germanium (Ge) doped silicon in source/drain regions associated with the active channel regions of the PMOS transistors;
- and
- forming a tensile layer on the NMOS and PMOS transistors.
A method of forming an integrated circuit comprising:
- selectively forming active channel regions for NMOS and PMOS transistors on a substrate parallel to a <100> crystal orientation thereof;
- implanting Carbon (C) into source/drain regions associated with the active channel regions of the NMOS and PMOS transistors;
- and
- forming a tensile layer on the NMOS and PMOS transistors.
A method of forming an integrated circuit comprising:
- selectively forming active channel regions for NMOS and PMOS transistors on a substrate parallel to a <100> crystal orientation thereof;
- selectively epitaxially growing Carbon (C) doped silicon in source/drain regions associated with the active channel regions of the NMOS and PMOS transistors;
- and
- forming a tensile layer only on the NMOS transistors.
A method of forming an integrated circuit comprising:
- selectively forming active channel regions for NMOS and PMOS transistors on a substrate parallel to a <100> crystal orientation thereof;
- selectively epitaxially growing Carbon (C) doped silicon in source/drain regions associated with the active channel regions of the NMOS and PMOS transistors;
- forming a tensile layer on the NMOS transistors;
- and
- forming a compressive layer on the PMOS transistors.
Dependencies are inferred from the claim text.