Stacked semiconductor device and related method

A method of fabricating a stacked semiconductor device, comprising:

• forming a preliminary first insulating interlayer on a substrate comprising single crystalline silicon, wherein the preliminary first insulating interlayer comprises a first opening exposing a first portion of the substrate;
• forming a first preliminary first seed pattern in the first opening;
• forming a preliminary second insulating interlayer on the first preliminary first seed pattern and the preliminary first insulating interlayer;
• partially etching the preliminary first insulating interlayer and the preliminary second insulating interlayer to form a trench exposing a first upper portion of the first preliminary first seed pattern;
• forming a first seed pattern in the first opening by partially etching the first upper portion of the first preliminary first seed pattern, wherein the first seed pattern comprises a second upper portion disposed over the first opening, and the second upper portion is tapered away from the substrate;
• and
• forming a first single crystalline silicon structure in the trench using the first seed pattern as a seed.