Method and apparatus for controlling evaluation of protected intellectual property in hardware
AssigneeAltera Corporation
InventorsJeffrey R. Fox, Brad Kadet, Roger Bryner, Craig Lytle
Life of this patent
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AssigneeAltera Corporation
InventorsJeffrey R. Fox, Brad Kadet, Roger Bryner, Craig Lytle
Estimating the term…
Various techniques permit more thorough development of digital systems and devices by designers while protecting the proprietary interests of the owners of the intellectual property incorporated in such systems and devices. More specifically, systems, apparatus, methods and computer program products control use of hardware and software and IP implemented as user logic in a programmed device. The programmed device includes programmed logic that has designed logic and control logic. The designed logic includes user logic and protected logic such as IP cores, the use of which is to be controlled. The control logic includes a signal generator external to the designed logic. This signal generator contains clock means and a timeout circuit. A controller is connected to the programmed device by a tether. The controller periodically sends a keep alive signal via the tether to the signal generator. These keep alive signals may be single bit or multi-bit tokens which are processed in the programmed device by the signal generator. The signal generator disables the programmed device when the signal generator reaches a programmed time limit before receiving a keep alive signal from the controller. Disabling the programmed device can be accomplished by disabling either the user logic or the protected logic or both.
A logic device for testing a circuit design, the logic device comprising:
An apparatus for controlling hardware and software, the apparatus comprising:
A method of controlling hardware and software, the method comprising:
Dependencies are inferred from the claim text.