Semiconductor memory module with error correction

A semiconductor memory module with on-board error correction capability, comprising:

• a module circuit board having at least one an internal layer having a first surface and a second surface;
• a plurality of memory chips each comprising a memory cell array having memory cells for storing data, the plurality of memory chips comprising a first group of the plurality of memory chips arranged in a first row on the first surface of the module circuit board and a second group of the plurality of memory chips arranged in a second row adjacent the first row on the first surface of the module circuit board, wherein a first designated memory chip stores data for error correction purposes and the first designated memory chip is arranged on the first surface of the module circuit board adjacent the first and second groups of memory chips;
• and
• a control chip on the first surface of the circuit board that drives the plurality of memory chips with control signals and corrects data read out erroneously from memory cells of the memory chips in the first group or second group of memory chips based on data for error correction that is stored in the first designated memory chip.

A semiconductor memory module with on-board error correction capability, comprising:

• a module circuit board having at least one an internal layer having a first surface and a second surface;
• a plurality of memory chips each comprising a memory cell array having memory cells for storing data, the plurality of memory chips comprising a first group of the plurality of memory chips arranged in a first row on the first surface of the module circuit board and a second group of the plurality of memory chips arranged in a second row adjacent the first row on the first surface of the module circuit board, wherein a first designated memory chip stores data for error correction purposes and the first designated memory chip is arranged on the first surface of the module circuit board adjacent the first and second groups of memory chips;
• a control chip on the first surface of the circuit board that drives the plurality of memory chips with control signals and corrects data read out erroneously from memory cells of the memory chips in the first group or second group of memory chips based on data for error correction that is stored in the first designated memory chip;
• and
• a control bus that comprises a first end connected to the control chip and which transmits the control signals along the internal layer of the module circuit board;
• wherein the module circuit board comprises a plurality of contact-making holes extending from the first surface of the module circuit board at least to the internal layer and a second end of the control bus connected to a designated contact-making hole of the plurality of contact-making holes, wherein the first designated memory chip is connected to the control bus via a conductor track on the first surface of the module circuit board and via said designated contact-making hole.

A semiconductor memory module with on-board error correction capability, comprising:

• a multilayer module circuit board comprising a plurality of internal layers and a first surface and a second surface;
• a plurality of memory chips each comprising a memory cell array having memory cells for storing data, the plurality of memory chips comprising a first group of the plurality of memory chips arranged in a first row on the first surface of the module circuit board and a second group of the plurality of memory chips arranged in a second row adjacent the first row on the first surface of the module circuit board, wherein a first designated memory chip stores data for error correction purposes and the first designated memory chip is arranged on the first surface of the module circuit board adjacent the first and second groups of memory chips;
• control chip on the first surface of the circuit board that drives the plurality of memory chips with control signals and corrects data read out erroneously from memory cells of the memory chips in the first group or second group of memory chips based on data for error correction that is stored in the first designated memory chip;
• a control bus that comprises a first end connected to the control chip and which transmits the control signals along one of the plurality of internal layers of the module circuit board;
• wherein the module circuit board comprises a plurality of contact-making holes extending from the first surface of the module circuit board to one of the plurality of internal layers, wherein the first designated memory chip is connected to the control bus via a conductor track on the first surface of the module circuit board and via said designated contact-making hole.