Semiconductor device

A semiconductor device comprising;

• a first memory copying and holding a data held by a storage device;
• a second memory holding a check code of a data held by said first memory, in each of the blocks obtained by dividing the data by an arbitrary data length, and being supplied with a source voltage not lower than a data-holding-guarantee voltage;
• and
• an operating unit executing data verification processing which detects error in data held in said first memory based on said check code, and reloading processing which copies only the data corresponding to the block having a data error detected therein from said storage device to said first memory, based on a supplied computer program;
• wherein, in an arbitrary operation different from a normal operation, said first memory is supplied with a positive source voltage lower than the data-holding-guarantee voltage.

A semiconductor device comprising:

• a first memory copying and holding a fixed data held by a storage device;
• a second memory holding a check code of the fixed data in each of the blocks obtained by dividing the fixed data by an arbitrary data length, and being supplied with a source voltage not lower than a data-holding-guarantee voltage;
• a third memory holding a variable data, different from said first and second memories;
• a data check unit detecting error in the fixed data held by said first memory based on said check code;
• and
• a reloading unit copying only the fixed data corresponding to the block having a data error detected therein by said data check unit, from said storage device to said first memory,
• wherein, in an arbitrary operation different from a normal operation, the variable data held in said third memory is copied to said storage device, and a positive source voltage lower than the data-holding-guarantee voltage is then supplied to said first and third memories.

A semiconductor device comprising:

• a first memory copying and holding a data held by a storage device;
• a second memory holding a check code of the data, and being supplied with a source voltage not lower than a data-holding-guarantee voltage;
• a data check unit detecting error in the data held by said first memory based on said check code;
• and
• a voltage setting unit setting a source voltage to be supplied to said first memory in an arbitrary operation different from a normal operation, depending on a result detected by said data check unit;
• and
• an output-voltage-variable power source unit supplying the source voltage to said first memory, depending on the setting by said voltage setting unit.