Graphics system with reduced shadowed state memory requirements
AssigneeNVIDIA Corporation
InventorsGregory M. Eitzmann, John S. Montrym, Richard A. Silkebakken
Life of this patent
Estimating the term…
Abstract
A graphics processing unit has a reduced memory space shadow memory as a source of state information for performing validation of commands. The reduced memory space shadow memory is smaller in size than a full version of state variables associated with an abstract state machine representation of a class of commands received from a software driver.
Claims20
A graphics processing unit, comprising:
- a graphics pipeline;
- a front-end acting as an interface to map a class of commands received from a software driver to a series of instructions for said graphics pipeline, said class of commands having a corresponding abstract state machine representation that includes a set of state variables;
- validation logic associated with said front-end to check the validity of input commands from said software driver;
- a reduced memory space shadow memory coupled to said validation logic, said reduced memory space shadow memory storing a representation of state information for performing validations of said class of commands that is smaller in size than a full version of said set of state variables;
- said validation logic utilizing said reduced memory space shadow memory as a source of state information for performing validation.
The graphics processing unit of claim wherein said translated version of a state version is a bit code representing a state variable.
A graphics system, comprising:
- a graphics driver to issue a sequence of graphics commands belonging to a class of commands, said class of commands having a corresponding abstract state machine representation that includes a set of state variables;
- a graphics processing unit communicatively coupled to said graphics driver, said graphics processing unit comprising:
- a graphics pipeline;
- a front-end to receive commands from said graphics driver, said front-end acting as an interface to map said class of commands to a series of instructions for said graphics pipeline;
- validation logic to check the validity of input commands received from said software driver;
- a set of flip-flops coupled to said validation logic to act as a reduced memory space shadow memory, said set of flip-flops storing a representation of state information for performing validation of said class of commands that is smaller in size than a full version of said set of state variables;
- said validation logic utilizing said reduced memory space shadow memory as a source of state information for performing validation.
A method of operating a graphics processor, comprising:
- shadowing state variables for use in performing validity checks by storing a reduced memory space shadow memory representation of a set of state variables of a class of commands for performing validity checks, said reduced memory space shadow memory representation being smaller in size than a full version of said set of state variables;
- and
- in response to an input command, performing a validation using said reduced memory space shadow memory representation.
Dependencies are inferred from the claim text.