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US 7,681,066 B2Granted
Quantifying core reliability in a multi-core system
AssigneeIntel Corporation
InventorsPadmashree K. Apparao, Robert F. Kwasnick
Life of this patent
Estimating the term…
Abstract
A system may comprise a first processor core, a second processor core and a processor core assignor. The first processor core may include a first circuit to generate a first data and a second processor core may include a second circuit to generate a second data. The processor core assignor may assign a first thread to the first processor core or to the second processor core based on the first data, the second data, and an application reliability requirement.
Claims14
A system comprising:
- a first processor core comprising a first circuit to generate a first data, wherein the first data is associated with a generated oscillation frequency of the first circuit;
- a second processor core comprising a second circuit to generate a second data, wherein the second data is associated with a generated oscillation frequency of the second circuit;
- a database comprising:
- a first reliability level assigned to the first processor core, the first reliability level associated with a case when a percentage difference between a stored initial oscillation frequency of the first circuit and the generated oscillation frequency of the first circuit is greater than a first reliability percentage, and
- a second reliability level assigned to the second processor core, the second reliability level associated with a case when a second percentage difference between a stored initial oscillation frequency of the second circuit and the generated oscillation frequency of the second circuit is greater than a second reliability percentage;
- and
- a processor core assignor to assign an application to the first processor core in a case that the first reliability level is equal to an application reliability requirement associated with the application.
4 more elements
A method comprising:
- receiving a first data associated with a first processor core, wherein the first data is associated with a generated oscillation frequency of a first circuit;
- receiving a second data associated with a second processor core, wherein the second data is associated with a generated oscillation frequency of a second circuit;
- assigning a first reliability level to the first processor core, the first reliability level in a case when a percentage difference between a stored initial oscillation frequency of the first circuit and the generated oscillation frequency of the first circuit is greater than a first reliability percentage, and
- assigning a second reliability level to the second processor core, the second reliability level in a case when a second percentage difference between a stored initial oscillation frequency of the second circuit and the generated oscillation frequency of the second circuit is greater than a second reliability percentage;
- and
- assigning, via a processor core assignor, an application to the first processor core in a case that the first reliability level is equal to an application reliability requirement associated with the application.
3 more elements
A system comprising:
- a double data rate memory;
- a first processor core comprising a first circuit to generate a first data, wherein the first data is associated with an oscillation frequency of the first circuit;
- a second processor core comprising a second circuit to generate a second data, wherein the second data is associated with an oscillation frequency of the second circuit;
- a database comprising:
- a first reliability level assigned to the first processor core, the first reliability level associated with a case when a percentage difference between a stored initial oscillation frequency of the first circuit and the generated oscillation frequency of the first circuit is greater than a first reliability percentage, and
- a second reliability level assigned to the second processor core, the second reliability level associated with a case when a second percentage difference between a stored initial oscillation frequency of the second circuit and the generated oscillation frequency of the second circuit is greater than a second reliability percentage;
- and
- a processor core assignor to assign an application to the first processor core in a case that the first reliability level is equal to an application reliability requirement associated with the application.
5 more elements
Dependencies are inferred from the claim text.