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US 7,681,044 B2Granted
Secure processor and system
AssigneeFujitsu Microelectronics Limited
InventorSeiji Goto
Life of this patent
Estimating the term…
Abstract
A processor includes an execution unit configured to execute a program, a bus coupled to the execution unit, a local memory coupled to the bus, a DMA unit coupled to the bus, and an interface to couple the bus to an exterior, wherein the DMA unit is configured to perform a DMA transfer process in response to instruction from the execution unit, to load information by the DMA transfer process from the exterior through the interface, to decrypt the loaded information, and to write the decrypted information to the local memory by the DMA transfer process.
Claims10
A processor, comprising:
- an execution unit configured to execute a program;
- a bus coupled to said execution unit;
- a local memory coupled to said bus;
- a secured DMA unit coupled to said bus and having a decryption/encryption function;
- and
- an interface to couple said bus to an exterior,
- wherein said secured DMA unit is configured to perform a DMA transfer process transferring information from the exterior to the local memory in response to instruction from said execution unit, said DMA transfer process loading the information from the exterior through said interface, decrypting the loaded information by use of the decryption function, and writing the decrypted information to said local memory, wherein said secured DMA unit has said decryption/encryption function in addition to a conventional DMA transfer function to decrypt the encrypted information upon executing a DMA transfer process command.
4 more elements
A system, comprising:
- a memory;
- an external bus coupled to said memory;
- and
- a processor coupled to said external bus, wherein said processor includes:
- an execution unit configured to execute a program;
- an internal bus coupled to said execution unit;
- a local memory coupled to said internal bus;
- a secured DMA unit coupled to said internal bus and having a decryption/encryption function;
- and
- an interface to couple said internal bus to said external bus,
- wherein said secured DMA unit is configured to perform a DMA transfer process transferring information from said memory coupled to said external bus to the local memory in response to instruction from said execution unit, said DMA transfer process loading information from said memory through said interface, decrypting the loaded information by use of the decryption function, and writing the decrypted information to said local memory, wherein said secured DMA unit has said decryption/encryption function in addition to a conventional DMA transfer function to decrypt the encrypted information upon executing a DMA transfer process command.
8 more elements
Dependencies are inferred from the claim text.