Executing functions determined via a collection of operations from translated instructions
AssigneeSun Microsystems, Inc.
InventorJohn Gregory Favor
Life of this patent
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AssigneeSun Microsystems, Inc.
InventorJohn Gregory Favor
Estimating the term…
Reference architecture instructions are translated into target architecture operations. In some embodiments, an execution unit of a processor executes a function determined from a collection of operations, the function specifying functionality based on instructions, the collection selected from operations translated from the instructions. In further embodiments, the function is specified as a fused operation. Sequences of operations are optimized by fusing collections of operations; fused operations specify a same observable function as respective collections, but advantageously enable more efficient processing. In some embodiments, a collection comprises multiple register operations. Sequences of operations, in a predicted execution order in some embodiments, form traces. In some embodiments, fusing operations requires setting only final architectural state, such as final flag state; intermediate architectural state is used implicitly in a fused operation. In some embodiments, fused operations only set architectural state, such as high-order portions of registers, that is subsequently read before being written.
A method comprising:
A system comprising:
A processor comprising:
A tangible medium readable by a computer system that contains descriptions that specify, when processed by the computer system, a circuit comprising:
Dependencies are inferred from the claim text.